cbscpe wrote:
Hi i_r_on,
It's really a tight fit. But now I start to ask myself what happens after the image has been loaded and executed and an interrupt occurs. If I understand your design correct $E000..$FFFF always is the ROM which is the GAL. Or do you have some other mechanism? I would have added another GAL as an address decoder and a 128kbyte RAM instead of a 32kbyte RAM. I would also add a BOOT output to the arduino that changes the decoder. If the bit is set, reads always enable the GAL and writes enable always the RAM. If the bit is cleared the GAL is disabled and except for the IO range the RAM is enabled, optionally write-protect the upper part. Once you clear the bit another reset would then use the reset vector in the program image loaded into the RAM.
Peter
Actually this is just a test board but it doesn't matter for the bootloader rom to take space as much as 256 bytes or 4K or even 32k in my case. I don't have any rom routines. What I need is a means to transfer data to ram and execute there. c64 sid files doesn't rely much on existing rom code. So I'll have a bus control signal to my address decoder so that I could switch rom off leave the ram behind it accessible. Also original c64 didn't have more than 64k general purpose ram so I don't need anything beyond that. I would get along with less for sure (except for digi tunes) but then the software would get unnecessarily complex.
And the speed is also important for me since I don't have any other peripheral in my 6502 system and everytime I play a sid I use this hack to transfer the sid music to the ram and execute there. They are on average 4K-6K sizes. With a speed optimized version of this transfer routine I can send average size tunes in 1-2 seconds.
Why this bootloading from gal or 32 bytes rom mechanism is a very useful future for me? It's because now I can test second stage stuff without burning them anywhere. I just build 6502 assembly code and copy paste it into my arduino sketch.
I could revisit using a GAL as an address decoder but I was not able to decode a proper signal for swinsid properly previously. Maybe bad luck or insufficient knowledge I don't know. In my current test setup I only have 74LS138 and a 74HC00 (32K RAM, 8K INT0, 8K INT1, 8K IO, 8K ROM) I'll rework it once I layout a single board design. Now the priority is to increasing compatibility with sid tunes and incorporating a VIA or emulating timer/interrupt functionality of it in arduino.
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