Does anyone know what the default power on states are for the registers in the 6522? I need to know in particular which way the data direction registers are when powered up. Thanks!

Just picking up the Synertek data book beside me, I read:

It should be pretty standard in I/O ICs that bidirectional pins default to inputs to make sure two outputs connected to each other (from two different chips) don't short each other out.

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What's an additional VIA among friends, anyhow?

It may depend on which version of the 6522 you are using. The appropriate data sheet is your friend with something like this.

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The MOS and Rockwell datasheets do not state the default power-on state (which is why I asked here). I would assume it would be the same as a reset, in that the I/O's would be inputs with everything turned off. I guess it doesn't matter what is the timer latches/counters as long as the timers are turned off.

Section 3.9 of the WDC 65C22 data sheet describes the state of the device following a hard reset, which would also apply to a cold start, viz:

3.9 Reset (RESB)

Reset clears all internal registers (except T1 and T2 counters and latches, and the SR. In the RESB
condition, all pins are placed in the input state and bus holding devices maintain initial level if not driven.
The initial level can be Logic 1 or Logic 0 and are not initialized by on chip circuitry. Also, T1 and T2, SR
and the interrupt logic are disabled from operation. All inputs have NOR gates with reset overriding the
input pin value. Schmitt trigger NOR gates are on CA1, CA2, DB1, CB2, and PH2. Reset has a Schmitt
trigger inverter input. The W65C22S RESB input has a bus holding device.

You should keep in mind that the 65C22's reset input should be held low until Vcc has stabilized and the Ø2 clock has started. Devices such as the Maxim DS1813 are useful for this purpose, as they generate a programmed reset via a fully resettable timer.

My general philosophy over the years (nearly 40, now, of writing 6502 assembly language programs) has been to assume nothing about a device's state at power-on or reset and configure all registers in a meaningful way, usually with a data table.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

I didn't think about the difference between "power-on state" and "reset," because it is standard for the reset circuit to do its job at power up, not just when someone pushes a button. But yes, it's an interesting situation.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Machines like the VIC-20 and Commodore 64 had 555 timers to program the reset at power-on. The delay before release of /RESET was chosen to assure that initial circuit conditions stabilized before the MPU was allowed to start executing instructions. Neither of those machines had a reset push button, but adding one was a common enhancement.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

I know that 6522 and 65C22 chips are different, much like 6502 and 65C02 chips are quite a bit different. I guess I need to burn an EPROM and see what the registers look like on power up.