As I'm using an old NMOS 6509 I'm thinking about different memory layouts:

Simply switching the whole 64kb with the MMU registers 00/01 - easy to implement, but the botched design with the registers 00/01 appearing everywhere making the address space non-continuous. Dr. Jeffyl, you said something about "the flawed but fixable 6509" (http://forum.6502.org/viewtopic.php?f=10&t=2997&hilit=6509#p33930) - are there really ways to fix that issue? Or was that a fix in a FPGA redesign?

Using 00/01 to switch 16kb/32kb memory banks, e.g. CPU sees C000-FFFF part of a 256kb ROM, P0-3 select which 16kb of the ROM are accessible. As the 6509 doesn't have continuous memory space anyway, I could keep ZP,Stack and I/O in all memory configurations.

Taking a completely different approach, which doesn't use 6509s features (but they surely will be re-used in some other way): Instead of banking in a larger window of 16-32kb, focus on the 6502 architecture and use banks of two pages (to allow for abs,X/abs,Y). That would mean CPU can do pointer arithmetic at 8-bit boundaries. Each window would require a set of adders so bit 9 can be calculated in. At my 2MHz speed there would be enough time (300ns TACC, 100ns RAM, that leaves 200ns - almost propagation delay of almost 10 times nibble adders), at higher speeds that would be difficult. And, of course, this would require quite some board space.

I meant a redesign -- something that would allow us both to have the registers at 00/01 (because they're necessary for mapping control)... and also not have the registers at 00/01 (because they fragment the 1 MB space)! Here's how. Indirect-Y mode is mandatory when accessing extended memory via the registers, but a person would never need to use Indirect-Y mode to access the registers themselves. That means the problem would be solved if the select logic for accessing the registers themselves would look for address 0000/0001 and require that Indirect-Y mode not be in effect. That'd be easy to arrange in an FPGA design but it's not something you could retrofit to an existing 6509.

( Maybe existing 6509s do feature such logic. After all, it would've been easy for MOS to do it that way -- a minor change with major benefits! But the datasheet is vague, and I don't have a 6509 to test. Therefore I posed the question in this post, which is part of the thread MOS 6509 look-alikes. )

Clever idea -- I like it!

Another clever idea. I think I understand, but, to be sure, let me explain it back to you.

In the small map (64K) you have a page set aside -- let's say it's page $20 ($2000-$20FF). Your custom hardware causes page $20 to map to any desired page in the big map (1 megabyte?). For example, page $20 might map to page $113 ($11300-$113FF). But what do we do if indexing causes the CPU to output an address in page $21 instead? Your plan is to also have page $21 set aside. Of course it must map to page $114 for indexing to work -- and the adder you mentioned would compute $113 + 1 = $114.

The adder idea is workable, but the delay is a potential problem. There are alternatives. Since you already need some sort of register to hold the extended page address ($113), you could easily have another register to hold the $114. Software would pre-increment the value at the time both registers were loaded. If you used 74_670 IC's then the extra register would not require a lot of additional wiring. (For more on the '670, see the topic here.)

-- Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I tested yesterday evening - sadly lda/sta ($00),y accesses the CPUs registers not memory.


TY
I wonder if there would be an easy way to switch between windows of 32kbROM+16kbRAM and 16kbROM+32kbRAM.


Yes, you got it. And brought a major improvement to it.

I've found that, with enough headstrong obstinacy, almost anything is possible!

Is this a typo, Ralf? Based on my reading of the 6509 datasheet, you'd never code a lda/sta ($00),y. The operand could be from $02 to $FE, but $00 isn't useful. Here's a code example.


The suspected flaw is that this won't work if (for example) the value $12345 is replaced with any value ending in 0000 or 0001. Instead of accessing memory, the 6509 will access the special registers.

ETA: we need to access the special registers, but not with (ind),Y mode. In the code example I simply sta zero-page to update 6509_Ind_Reg.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Oh, yea, typo.... I meant ($02) and 02/03 containing 0000.


Yes, this flaw is not only suspected, but tested (see 6509-thread and my 6509 produced the same botched result). If ZPg_Ptr contains 0000 or 0001 - then access goes to register, memory (in writes) will contain what remains on the data bus (=in my case ZPg_Ptr address, $34 here).

A slight side track: I thoughthe 6809 as made by Motorla, not MOS? I dont't know huge amounts about it so I might be wrong.

6809, yes, made by Mot. Not the 6509 though.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Ahh ok. Forum posting late at night leads to silly mistakes .

Looking at the wiki entry it does seem to get slated for it's bank switching mechanism.
Why not use a 65816? Or is it a nostalgia thing?

Explanation of the nostalgia thing see here: http://forum.6502.org/viewtopic.php?f=12&t=3312