Okay, the "use an '816" suggestions aren't what I had in mind. Since I was deliberately vague, I guess I'll expand on my idea:
I was thinking of a minimal component 65C02 design that is the cheapest possible (goal would be < $35, but I wouldn't get my hopes up), but still provides:
VIA (and all pins of Port A/B and control are available for GPIO)
UART of some sort
64kB of RAM or more
Bootstrap from (serial) EEPROM into memory so max speed 14MHz is possible.
No PALs/GALs (may have no choice but to relax this requirement and just get someone else to program them for me for the time being).
Aside from TTL glue, the cost of chips is static (need 'C02, VIA, RAM, EEPROM). So the bootstrap and UART can be handled by a microcontroller with enough pins. So making the cheapest board becomes a task of optimizing for space on the PCB. 64kB RAM is rare, so I would go with 128kB to save space. But I feel bad that 64kB gets left unused
. Since I'll have a microcontroller already though, I figured one pin could be used for bank switching of some sort. But that may cause compatibility problems with existing code (don't reinvent the wheel now
) when subroutines between banks need to talk to each other, based on the assumptions my design makes. To get ideas about how previous existing systems handle bank switching was the purpose of my original post.
An '816 system automatically implies at least 2 extra ttl support chips. Even more since RDY qualification and VDA/VPA qualification are necessary.
EDIT: I know Garth provides a minimum 6502 SBC on his website. However, his use of EPROM/EEPROM precludes running at high speed, unless the EPROM is shadowed as part of boot-up routines (and wait states are added). Additionally, parallel EPROMs take up a bunch of real estate.
I probably shouldn't have been so abstract with my intentions, because now the stuff I'm worrying about is nearly off topic XD.