Finally found the list again I had wanted to link: Differences between FIG-Forth and ANS Forth (http://www.triangledigital.com/man2020f/ch1fig.htm). Note DO/LOOP, PICK, and ROLL especially, and ENDIF instead of THEN.

Thanks, Scot! I'm going to stick with FIG Forth for now. I'll make sure to incorporate the UM/MOD fix (http://6502.org/source/integers/ummodfix/ummodfix.htm). I will be getting back to this project soon. I've begun arranging components on my board.

Quick question - does anyone know if I could use a IDE-to-CF adapter (like this one: http://i00.i.aliimg.com/wsphoto/v0/1092 ... dapter.jpg) with a 8-bit CF interface? I see some examples (viewtopic.php?f=4&t=2877) but I don't see the connections listed. It sounds like it is simply a matter of connecting CF lines to 6502 buses with no additional logic. The data bus (D0-D7) and address (A0-A2) connections are straightforward.

But for the other lines (/IORD, /IOWR, /CS1, /CS2, /RESET), how would these be connected to the 6502 bus? I want to I/O map the CF card to 7F00 (with a 74LS138 I/O address decoder). Regarding output/write enables, are /IORD and /IOWR used, or /OE and /WE? What is the difference between these sets of CF control lines? Some CF interface implementations use /IORD and /IOWR while others use /OE and /WE.

/OE and /WE: http://www.walrus.com/~raphael/pdf/comp ... rticle.pdf
/IORD and /IOWR: http://read.pudn.com/downloads52/ebook/ ... S72032.pdf

Does anyone have some example CF loading/saving subroutines? I'm going to try coming up with Forth BLOCK storage subroutines that save each 1024-byte block as two 512-byte CF sectors.

Never mind about /IORD and /IOWR - those are the only read and write IDE control lines. I had been looking at the CF pinouts. I'll stick to IDE pinouts (40 pin). Whoops!