Hi guys

This is a question which has been floating around in my mind for a while now.
What is the best kind of physical layout of ICs are best for wire wrap (or which ones are recommended)?

I previous (and first) project was side by side devices with the power rails down one side.
This time around I'm going to be putting in star ground and power planes.
This is what I've come up with (sorry for the crudity of diagram - MS Paint ):


Per previous recommendations (cheers Garth), I'll be using a 6 pin wire wrap socket for the ground and power hub in the middle with an LM7805, etc. soldered to it. Also, each IC socket will be connected by no more than three wire wrap cables for things like buses and control lines etc.
And yes, I forgot to put the crystal in . Oh and I've removed the control lines from the diagram to de-clutter things

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Don't forget to leave room for bypass capacitors at each device.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Cool. Something like this:

Yes, except that unfortunately the Vcc and ground pins of most devices are at the corners and not next to each other. When you add the capacitors BDD is talking about, make the connections from each end of the capacitor to the IC as short as possible.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

The lines are purely symbolic - basically I just wanted to get an idea of the best kind of layout. .
With regard to the smooth caps I had already planned to pop in a 100nF ceramic for every 2-3 ICs, although I think I could get away with one every 5. I was also going to solder these between VDD and GND wire wrap pins underneath - unless this is a bad idea?

There should be capacitors at the center of the star; but putting one more for every 2-3 ICs does not qualify for getting it as close as possible to the pins with the connections as short as possible. Remember that even a short, straight piece of wire has inductance--about 20nH per inch of WW wire, and it doesn't get much better for fatter wire--and a sudden change in current through that inductance generates a voltage, such that things are no longer referenced to a steady ground, but to ground pins whose voltages are jumping all over.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I totally agree. This is what I've done with my previous 6502. I also normally put a 100nF on the 5V side of the 7805 and a 330nF on the other side.

I use AVX's SR275E104MAA for bypass caps, one per device.

Also, some fairly large (capacitance-wise) low ESR electrolytics should be spread around to help stabilize Vcc.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Isn't 0.1uF actually 100nF?
With regard to larger caps; I put a 33uF tantalum cap in on my last project. I read that tants are faster reacting for their capacity which is why I used one.
Do you recommend concentrating on low ESR and possibly a different type? Also, my previous design was simple: 1x65C02, 1xEEPROM, 1xRAM, 1x65C22, Oscillator + small amount of glue logic. Does such a design require just the one or would you normally put in X amount per IC much like the smaller bypass ones?

Yep! Late night message and not doing the math correctly! Also, I myself never refer to capacitor sizes in nanofarads. They are either farads, microfarads or picofarads in my little brain. In fact, when I started out in electronics, measurement in picofarads didn't exist. The measurement was MMFD for micromicrofarads.


Tantalums are good—better, actually, than electrolytics of the same capacitance—but tend to be pricey compared to low ESR electrolytics. That said, I use tantalums for the charge pump capacitors used with the MAX232-248 transceiver series, as their size and low leakage are attractive in that application.


Low ESR electrolytics are superior to standard ones, and are the better choice in digital design. However, you should note that their high frequency bypassing characteristics are not as good as ceramic, micas, etc. The main purpose of using electrolytics at various points is to "stiffen" Vcc. You should also have a bypass capacitor at each chip, with the shortest leads practical. If using a 7805 (or similar) regulator to power your unit place a 1000 µF electrolytic on the output side as close to the regulator as possible and also bypass the electrolytic with a 0.1 µF ceramic. This will give you the cleanest and most stable voltage.


It would depend on the physical layout and construction method. If you are doing it in wirewrap and using a star topography for Vcc and Gnd distribution, consider putting an electrolytic at the far end of each power distribution leg. Also, try to use heavier gauge wire for power distribution instead of the use 30 AWG wirewrap size. Your goals are to minimize ground bounce and Vcc fluctuations.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Fantastic - many thanks for the advice, BigD.

I've not heard of putting a 1000uF cap on the output of an LM7805. Do you mean like this?

Exactly.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

@BigDD
Out of interest,what do you class as low ESR?
I ask as they seem fairly expensive so I don't want to get this wrong lol
This one has 0.012 ohms but is £2.22+VAT (£2.66) each, but are Panasonic so probably worth it.
http://uk.farnell.com/panasonic-electro ... 0000005424

@Garth
I plan to solder the 0.1uF decoupling capacitors on to the wirewrap pins on th underside of the board. Is this how you would do this? Oh, and I assume that you also solder the wires for VDD and GND for each IC as, being thicker wire, cannot be wire wrapped?