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PostPosted: Tue Apr 07, 2015 3:34 pm 
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nyef wrote:
cr1901 wrote:
Thinking about buying a GAL programmer. I'd like to do a design without using GALs, but again, since Joachim's design of his first SBC proves 14MHz operation is possible with 74xx glue logic, I feel less obligated to do that now.

Note that Joachim's design uses 74F logic, which is old, power-hungry, and fast. As in, worst-case prop times lower than ACT, and power usage measured in mA rather than uA.

Even faster than 74F is 74ABT, which isn't as power hungry.

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PostPosted: Tue Apr 07, 2015 4:37 pm 
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BigDumbDinosaur wrote:
nyef wrote:
cr1901 wrote:
Thinking about buying a GAL programmer. I'd like to do a design without using GALs, but again, since Joachim's design of his first SBC proves 14MHz operation is possible with 74xx glue logic, I feel less obligated to do that now.

Note that Joachim's design uses 74F logic, which is old, power-hungry, and fast. As in, worst-case prop times lower than ACT, and power usage measured in mA rather than uA.

Even faster than 74F is 74ABT, which isn't as power hungry.

Oh, nice. Max prop times on a '00 less than half of a 74F. Now if only we could get a '138 in ABT...


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PostPosted: Tue Apr 07, 2015 5:23 pm 
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(At one time I thought it would be good to have a sticky thread summarising the strengths and weaknesses of the various 74 series families. I can't find such a thread, so evidently I didn't act on the thought. If anyone feels qualified to summarise, please start the thread, and update your head post as information comes in. If it looks good, perhaps it can be promoted to sticky. There's some supportive commentary at viewtopic.php?p=909 but I think a summary in a dedicated thread would be helpful.)


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PostPosted: Tue Apr 07, 2015 6:36 pm 
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nyef wrote:
BigDumbDinosaur wrote:
Even faster than 74F is 74ABT, which isn't as power hungry.

Oh, nice. Max prop times on a '00 less than half of a 74F. Now if only we could get a '138 in ABT...

The '138 is available in 74AC, which is about as fast as 74F, without the power consumption. I used the 74AC138 in POC, which will run at 15 MHz without the SCSI host adapter plugged in.

Attachment:
File comment: 74AC138 3-8 Decoder
74ac138_decoder.pdf [668.04 KiB]
Downloaded 97 times

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PostPosted: Tue Apr 07, 2015 7:01 pm 
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nyef wrote:
Oh, nice. Max prop times on a '00 less than half of a 74F. Now if only we could get a '138 in ABT...
Hmmm, the figures (below) for the CY74FCT138 are about half of those for 74F. :)
Attachment:
CY74FCT138 specs.gif
CY74FCT138 specs.gif [ 13.33 KiB | Viewed 1034 times ]
Attachment:
cy74fct138t.pdf [463.29 KiB]
Downloaded 84 times
Notice with this particular product there's a suffix that denotes different speed grades, with "C" being the fastest. Of course package options and availability are two potential show-stoppers for the hobbyist, but I'm glad to see that Mouser presently has the A version in stock in SOIC, offered in single-unit quantities.


BigEd wrote:
it would be good to have a sticky thread summarising the strengths and weaknesses of the various 74 series families
Perhaps that'd be helpful, but let me remind everyone that the filtered part searches offered by major suppliers on their web sites are an excellent way to find the best part for your needs. You just apply successively finer filters, filtering for the attributes you deem most important first.

The advantage of the filtered part search is it allows you to find options you were unaware of, or had perhaps forgotten. It lets you express the goal. :!: In this case, the goal isn't to find an ABT or FCT or whatever. The goal I sought was a fast, 138-type decoder that'll run on 5 volts. The logic family was determined last -- not first.

Although there are other good examples, it's the DigiKey site I use most. From their main page, go to Product Index (not Catalog).

cheers,
Jeff

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Last edited by Dr Jefyll on Tue Apr 07, 2015 7:04 pm, edited 1 time in total.

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PostPosted: Tue Apr 07, 2015 7:03 pm 
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Good point Jeff!


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PostPosted: Tue Apr 07, 2015 7:29 pm 
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BigEd wrote:
(At one time I thought it would be good to have a sticky thread summarising the strengths and weaknesses of the various 74 series families. I can't find such a thread, so evidently I didn't act on the thought. If anyone feels qualified to summarise, please start the thread, and update your head post as information comes in. If it looks good, perhaps it can be promoted to sticky. There's some supportive commentary at viewtopic.php?p=909 but I think a summary in a dedicated thread would be helpful.)

I too thought that there was such a thread, but evidently not the case. Here's a by-no-means-complete summary.

  • 74xx

    The original "high speed" TTL logic, developed during the 1960s. A MILSPEC version is 54xx. Good switching speed, weak fanout, high power consumption. 74xx should only be used for historical restorations.

  • 74Sxx

    "Schottky" TTL logic, released as an upgrade to 74xx. Better switching speed, better fanout, higher power consumption. 74Sxx should only be used for historical restorations.

  • 74LSxx

    "Low-power Schottky" TTL logic, developed to address the power consumption issues of 74Sxx. Switching speed comparable to 74S, but with slightly weaker fanout. 74LSxx was the mainstay of computer circuits for a long time, but is no longer recommended for new designs.

  • 74Cxx

    The 74xx series in CMOS, developed to further reduce power consumption, as well as improve noise immunity. Switching speed is not as good as 74LSxx, and is affected by operating voltage. Fanout tends to be weak. The inputs of 74Cxx devices cannot be interfaced with the outputs of 74xx, 74Sxx or 74LSxx devices due to differing voltage thresholds. 74Cxx is generally obsolete and should not be used except in historical restorations.

  • 74HCxx & 74HCTxx

    "High speed" CMOS devices that are faster than 74Cxx. Switching speeds are generally comparable to 74LSxx devices when operated at 5 volts. The inputs of 74HCTxx devices are compatible with the outputs of TTL devices, although a given 74HCTxx device will be slightly slower than its 74HCxx equivalent. Good fanout, low power consumption and suitable for designs that do not demand maximum performance.

  • 74ACxx & 74ACTxx

    "Advanced" CMOS devices that are substantially faster than 74HC and 74LS. Many devices possess propagation times in the single digit nanosecond range when operated at maximum recommended voltages. The inputs of 74ACTxx devices are compatible with the outputs of TTL devices, although a given 74ACTxx device will be slightly slower than its 74ACxx equivalent. Wide selection of devices and in some cases, package styles. Very rapid output switching speeds and moderate power consumption, depending on the applied loads, but with excellent fanout. Recommended for new designs, especially if elevated clock speeds are important.

  • 74ABTxx

    Very high speed CMOS devices that combine the switching speeds of bi-polar TTL logic with the noise immunity and fanout of CMOS. 74ABTxx possesses propagation times in the single digit nanosecond range when operated at maximum recommended voltages, with some devices very close to a 1ns prop time. Somewhat limited selection of devices and in some cases, package styles, with most being SOIC or similar. Extremely rapid output switching speeds and moderate to high power consumption, depending on the applied loads, but with excellent fanout. Recommended for new designs, especially where high clock speeds will be used.

  • 74Fxx

    A "fast" type of TTL logic, with some devices being as much as four times as fast as their 74LSxx equivalents. Good fanout but with high power consumption and limited selection. Not recommended for new designs.

  • 74FCTxx

    Similar in many ways to 74ABTxx, as well as 74Fxx, with TTL compatible inputs. Many devices possess propagation times in the single digit nanosecond range when operated at maximum recommended voltages. Limited selection of devices and in some cases, package styles. Extremely rapid output switching speeds and relatively high power consumption, depending on the applied loads, but with excellent fanout. Recommended for new designs, especially where high clock speeds will be used.

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PostPosted: Tue Apr 07, 2015 9:46 pm 
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BigDumbDinosaur wrote:
cr1901 wrote:
BDD's solution will work for fixing RST, but I'm trying to determine whether I can't reduce the prop-delay from his implementation to keep 14MHz operation with discrete components.

:?: :?: :?:

I meant RDY. I was thinking out loud; I want to avoid adding numerous components to the CLK circuit as seen by the bank latch and data transceivers- b/c at 14MHz, every nanosecond counts.


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PostPosted: Fri Apr 10, 2015 11:54 pm 
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Re: bootstrapping using a microcontroller... I decided to try making a RDY circuit that is controllable by a microcontroller. Events are clocked during the rising edge of PHI2. If the microcontroller's (ucon) address space is chosen (USEL), RDY is driven low. If the ucon has not already done so, it must drive its own GPIO pin low (UPROCESS) to represent that it is ready to process new data. When the ucon is done processing, it sets UPROCESS high. Upon receipt of the next positive edge of PHI2, this will force RDY high for one bus cycle; if USEL is chosen again, RDY will immediately be driven low again after the positive edge of PHI2, and the process repeats.

A microcontroller is not going to be able to set/unset its GPIO pins once per 6502 bus cycle at high speeds. While this significantly cuts the speed of microcontroller accesses, this is a simple arbitration circuit so a ucon can communicate with a 65xx reliably.

This is as simple as I can get it, but I don't think it's enough anyway o.0;
Code:
RDY=Q*USEL + ~UPROCESS
Q'=UPROCESS * ~USEL

Q is the output of a positive-edge triggered flip-flop, such as the SN74HCT74. The circuit requires 5 gates (2 NOTs, 2 ANDs, 1 OR).

Here is the truth table:
Code:
Q USEL UPROCESS | Q' RDY
0 0    0        | 0  1
0 0    1        | 0  1
0 1    0        | 1  0
0 1    1        | 0  0
1 0    X        | X  X ;USEL=0 while in state 1 is impossible.
1 1    0        | 1  0
1 1    1        | 0  1


At 14MHz, I think the prop delay on the critical path is too much, the way I have my schematic drawn. I wonder if I can find an more compact/IC solution...


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