So far, so good. Thanks to bitwise I've gotten a better idea of how this works (thanks to his example from earlier). Modifying that, I've added in a couple of swap bank inputs and four swap bank chip select output.
One slight concern is that the high pins are outputting 4V-4.3V instead of 5V. Is this normal? With CMOS I though it outputs the same level as VDD (in this case 5V). I know CMOS is supposed to be 2/3rds of VDD so 3.3V so it should be fine - but it just makes me wonder why this happens and if it's normal for a GAL.
BTW, the sb0 & sb1 input pins (pins 10 &11) are for selecting the swapbank RAM. There are 4 possible value:
00 - bank 0 selected (SWAPBANK0 / pin 19)
01 - bank 1 selected (SWAPBANK0 / pin 20)
10 - bank 2 selected (SWAPBANK0 / pin 21)
11 - bank 3 selected (SWAPBANK0 / pin 22)
Code:
Name AddressDecoder;
Partno Lattice22V10B;
Date 02/04/15;
Revision 01;
Designer shalewyn.com;
Company shalewyn.com;
Assembly XXXXX;
Location XXXXX;
Device g22v10;
/*
* Lattice GAL 22V10B pinout, DIP, top view
*
* I/CLK.[ 1 24 ].VCC
* I.[ 2 23 ].I/O/Q
* I.[ 3 22 ].I/O/Q
* I.[ 4 21 ].I/O/Q
* I.[ 5 20 ].I/O/Q
* I.[ 6 19 ].I/O/Q
* I.[ 7 18 ].I/O/Q
* I.[ 8 17 ].I/O/Q
* I.[ 9 16 ].I/O/Q
* I.[ 10 15 ].I/O/Q
* I.[ 11 14 ].I/O/Q
* GND.[ 12 13 ].I
*
*
*
* $1000-$1FFF - %0000 0000 0000 0000 - %0001 1111 1111 1111
* $2000-$7FFF - %0010 0000 0000 0000 - %0111 1111 1111 1111
* $8000-$800F - %1000 0000 0000 0000 - %1000 0000 0000 1111
* $8010-$801F - %1000 0000 0001 0000 - %1000 0000 0001 1111
* $8020-$802F - %1000 0000 0010 0000 - %1000 0000 0010 1111
* $8040-$804F - %1000 0000 0100 0000 - %1000 0000 0100 1111
* $9000-$FFFF - %1001 0000 0000 0000 - %1111 1111 1111 1111
*
*
* !Pin 17 - non-swap RAM $0000-$1FFF
* !Pin 18 - Swap bank 0 - $2000-$7FFF
* !Pin 19 - Swap bank 1 - $2000-$7FFF
* !Pin 21 - /VIA 1 - $8000-$800F
* !Pin 22 - /VIA 2 - $8010-$801F
* !Pin 23 - /ROM - $9000-$FFFF
*
*
* Inputs
*/
/* Inputs */
PIN 1 = PHI2;
PIN 2 = R_W;
PIN [3..6] = [A15..12];
PIN [7..9] = [A6..4];
PIN 10 = sb0;
PIN 11 = sb1;
/* Outputs */
PIN 14 = !RD;
PIN 15 = !WR;
PIN 16 = !VIA1;
PIN 17 = !VIA2;
PIN 18 = !BASERAM;
PIN 19 = !SWAPBANK0;
PIN 20 = !SWAPBANK1;
PIN 21 = !SWAPBANK2;
PIN 22 = !SWAPBANK3;
PIN 23 = !ROM;
/* Rules */
RD = PHI2 & R_W;
WR = PHI2 & !R_W;
BASERAM = !A15 & !A14 & !A13 & !A12;
SWAPBANK0 = !A15 & !A14 & A13 & !A12 & !sb0 & !sb1
# !A15 & !A14 & A13 & A12 & !sb0 & !sb1
# !A15 & A14 & !A13 & !A12 & !sb0 & !sb1
# !A15 & A14 & !A13 & A12 & !sb0 & !sb1
# !A15 & A14 & A13 & !A12 & !sb0 & !sb1
# !A15 & A14 & A13 & A12 & !sb0 & !sb1;
SWAPBANK1 = !A15 & !A14 & A13 & !A12 & !sb0 & sb1
# !A15 & !A14 & A13 & A12 & !sb0 & sb1
# !A15 & A14 & !A13 & !A12 & !sb0 & sb1
# !A15 & A14 & !A13 & A12 & !sb0 & sb1
# !A15 & A14 & A13 & !A12 & !sb0 & sb1
# !A15 & A14 & A13 & A12 & !sb0 & sb1;
SWAPBANK2 = !A15 & !A14 & A13 & !A12 & sb0 & !sb1
# !A15 & !A14 & A13 & A12 & sb0 & !sb1
# !A15 & A14 & !A13 & !A12 & sb0 & !sb1
# !A15 & A14 & !A13 & A12 & sb0 & !sb1
# !A15 & A14 & A13 & !A12 & sb0 & !sb1
# !A15 & A14 & A13 & A12 & sb0 & !sb1;
SWAPBANK3 = !A15 & !A14 & A13 & !A12 & !sb0 & sb1
# !A15 & !A14 & A13 & A12 & sb0 & sb1
# !A15 & A14 & !A13 & !A12 & sb0 & sb1
# !A15 & A14 & !A13 & A12 & sb0 & sb1
# !A15 & A14 & A13 & !A12 & sb0 & sb1
# !A15 & A14 & A13 & A12 & sb0 & sb1;
VIA1 = A15 & !A14 & !A13 & !A12 & !A5 & !A4;
VIA2 = A15 & !A14 & !A13 & !A12 & !A5 & A4;
ROM = A15 & !A14 & !A13 & A12
# A15 & !A14 & A13 & !A12
# A15 & !A14 & A13 & A12
# A15 & A14 & !A13 & !A12
# A15 & A14 & !A13 & A12
# A15 & A14 & A13 & !A12
# A15 & A14 & A13 & A12;