scotws wrote:
When does the effect become noticeable?
Any drop in supply voltage has an effect -- is that what you're asking? The logic switches a little more slowly, and that impacts the timing budget. To some extent you can get away with that -- it depends on how much extra timing margin there is. When the margin goes negative you have a problem. The computer will fail if the logic can't keep up with whatever clock speed you've chosen. The upshot is, the supply voltage directly relates to the potential maximum clock rate -- at least in theory. [D'oh! I didn't notice others had posted while I was typing. But Ed has given some good insight on the topic of margins.]
Windfall wrote:
Both use a 14 MHz rated W65C02, although a) can also employ a W65C816. a) is a DIP, runs at 5V, and up to 20 MHz (with 20 ns SRAM). b) is a QFP, runs at 3V3, and up to 24 MHz.
It does seem odd, John. And congrats on the nice work, btw! I suppose if you wanted to get to the bottom of this voltage/speed question you could find the max clock speed for the 5V machine, then run the test again
on the same machine but powered by 3.3V. Edit: Hmmm, I guess the ULA and what it attaches to make it tough to power that machine with 3.3V.
-- Jeff
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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
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