Hi
Apologies if I missed any previous re- constructions re Sym-1 type systems ...etc ..but from it is worth ..I wanted to play with a SYm-1 board (which I do not have any more) .. So I bread boarded one .. which I called mini board having 2k ram SYm monitor and running of PC USB port .For more info see my website ...

https://sites.google.com/site/gogleoops ... 2-mini-sbc

I do have pcb design of the board ..which will be free (gerber files) ..so you can order your own.. should be able to get them for approx $30 ..or less in quantity. Sorry I do not have any pcbs.. but happy to share costs if someone orders some... I used pld to reduce glue logic and decoding

Hi chessdoger. Welcome.

Your project looks very nice. Bravo!

Cheerful regards, Mike

Welcome chessdoger! Nice project - and some intriguing blank spaces on your website - let us know as you fill those out!

Cheers
Ed

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

made link to
http://wilsonminesco.com/

I love the way you've simplified the SYM-1 hardware and memory map for this recreation.

May I ask if there's a way to change the polarity of the 6532 'CRT' input and output pins in the SuperMON monitor in order to avoid having to add logic to invert those two signals?

Regards, Mike

Not sure ..I think you would have to alter Supermon software ..which would be not a good idea if trying to keep "standard" as much as possible.. But in saying that ..one thing I did look at is re routing the cassette input from PIA to the 6532 TTYIN pin(since TTYIN not used) so there was no need to use another peripheral chip (as cassette out comes from 6532)

Also using a pld chip it has extra spare pins so no problem providing 2 extra inverter gates (if needed)


...To add I suppose if you do not want to use the inverter gates and maybe use a max232 chip for Rs232 serial comms ..that gets rid of the inverters ..but you do not gain much as you then end up using the max chip + caps etc

I found the TTL to USB cable modules very useful as you do not have to (usually) have something like max232 chip and then end up using a serial port ..which tend to be scarce now on later model PC's going TTl to USB seems to be the minimal path...

I'm brain-storming how to modify an existing board design (below) for operation as your stripped down SYM-1. Instead of using a GAL or discrete logic for address decoding, I use a "soft decoder" function built into a PIC microcontroller. It's pretty easy to map the 6532 into the $A400..A5FF (I/O) and $A600..A7FF (RAM) address space using a pair of chip selects connected to the 6532 /CS2 (37) and RS (36) pins. Unfortunately, I don't have a way to invert the CRT (serial) signals without adding logic, which I'd like to avoid.

If I'm using a USB-to-Serial (TTL level) adapter, would I still need to invert the CRT (serial) signal lines coming from and going to the 6532?

Cheerful regards, Mike

Hi
The reason I built the keypad for mini SYM board was due to non communication with the 6532. It was only after I built that ...that I found that the input and output to 6532 has to be inverted (by echoing the output to CRT out pin on 6532)

SO to answer you last question ..yes in the end if you are using a ttl to USB module ..that will probably have to be inverted.

But as I replied before .. you could probably modify the supermon code to invert the signals.. however I think it be bit hard if you are not understanding how the whole I/o for CRT works ..I sort of looked at it at one point .. and said naghh ..best leave alone..

In a similar way I looked at using pics to control etc and be part of the old micro system ..however after some thought .. I think the issue in the end of use of micro controllers (as part of databases or address buss ) could be timing issue.. yes they can run fast 20Mhz+ ..but when they are executing their own code and providing I/O (e.g chip selects) that can slow the signals down.

Now it might not matter for say an old 1Mhz signal micro ..but anything faster ..you end up in timing issues.

Gals(PLD's) are almost at logic gate speed in execution(again depending on number of functions to perform ) and some of them can do it in 50ns or less.. I think you be pushing a micro controller to execute software and issue I/O signals that fast
So by all means try it out ..let us know ..as I was considering similar design in past

What I am considering ..in the end is using NVRAM (non-volatile RAm) that you can "program " beforehand (like the pic) with a programmer .. however their access is fast <100ns

so you can then use it as ROM/RAM The only issue with these is program going crazy and overwriting the ROM area..which would mean reprogramming the NVRAM again .. but probably could avoid it by making the WR signal non accessible for memory area that is reserved for ROM (say through pld chip control) see attached

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Bummer! I was hoping to avoid adding another chip.


I was hoping you knew how to modify the SUPERMON code. No worry! I'll take a look at it.


I haven't experienced any timing issues or anomalies but I spent a great deal of time doing research and performing experiments to verify system and bus timing. I'm using a 64-MHz PIC (Tcy = 62.5-ns) which is approximately the same performance level as a 16-MHz AVR.


GALs in DIP packages are great and I would use them if it weren't for; (1) the dwindling availability of high speed parts, (2) the cost, (3) the power consumption, and (4) the lack of a good DIY programmer design.

Please don't dismiss the capabilities of the PIC in an SBC design. Could I take a moment to explain its operation, please?

Since the PIC is generating the 1-MHz clock, it knows exactly when the address lines become valid during each 65C02 clock cycle. The PIC has plenty of time to look up the chip select pattern for the page being addressed and to update the chip select outputs 187.5-nsecs before the PHI0 rising edge. In fact, the PIC only uses three instruction cycles for the "soft decoder" function out of every sixteen instruction cycles that make up each 65C02 clock cycle.

Using a PIC in an SBC design isn't for everyone. In my case, I use it to provide reset, clock, and address decoder functions and to provide "blind loader" and "blind monitor" functions (including single-step capability) that run outside of 6502 address space. The capability of the "soft decoder" is pretty remarkable, too. Uploading a new 256 byte "decoder map" file into PIC flash memory over the serial port is all that's needed to map memory and resources to recreate an Apple-I, a KIM-1, an Elector Junior, etc., or to experiment with zero page I/O.

More later. Cheerful regards, Mike

What if it was a 6-pin surface-mount, with two inverters only -- ie; no more than what you need? These are available in families including 74HC, 74LVC and others. The packages are quite small -- eg: 1.3 or .95 mm lead pitch -- which may be considered either an advantage, a challenge, or both!


Although most of us are accustomed to considering 14- or 16-pin packages to implement our glue logic, it's worth remembering that nowadays we have other options.

• 6-pin packages can contain a single 3-input gate or 2 buffers or inverters
• miniature 8-pin packages are also available which contain other combinations

cheers,
Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I built POC V1.1 with two devices in small outline packages. The SRAM is in an SOJ-32 package (50 mil pin spacing) and the MAX-238 transceiver is in an SOIC-24 package, also 50 mil. SOIC-24 is easier to solder than SOJ, but both are manageable with manual techniques.

On the other hand, a 0.95 mm pin spacing would be tight.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Hi Jeff. Thanks for the input.

Those are viable options but I feel if I can stick to through hole packages it may be easier for newcomers to duplicate one of my projects or build a kit based on one of my projects. That said, I admit I've thought about using a surface mount SRAM chip in SOIC package on a couple projects so it's not an unreasonable leap to consider SMD for a few other small 'glue' devices, too...

Cheerful regards, Mike

1) & 2) Don't know how many you'd need, but I got 150 (50xGAL16V8, 50xGAL20V8, 50xGAL22V10) on eBay a couple of years ago for $80, all in. Just checked now on eBay. Still lots for sale at about a $1 a piece. Modern Atmel ATF750CLs can be had around $5 and they are still in production.

3) Power consumption for the Atmel ATF750CL (22V10) is about 0.15ma

4) I use WinCUPL (free from Atmel) and a $40 programmer I got off eBay that supports about 10,000 other devices.

The propagation delay for the Atmel ATF750CL is listed at about 15ns or less. Not too bad for most 6502 purposes. And if need be, you can still find CPLDs guaranteed to be less than 4ns. As well, CUPL is real easy to use. Just as easy, if not easier than, programming a PIC in C. Much easier than assembler. Just simple logic statements.

Of course, if you're a PIC guy, you might see Atmel as the evil empire

Anyway, just my 2 cents. Both are pretty good choices depending on your needs.

_________________
Bill