Might be of historical interest, might actually cover some details of the 65816 in a different way from the usual datasheet from WDC. This implementation can only be clock-stopped with the clock high, it seems. And it only goes up to 8MHz.
Pages 257-280 of http://bitsavers.trailing-edge.com/pdf/ ... I_ASIC.pdf
(26 Mbyte file)

Extra points if you find any unambiguous differences compared to the WDC product!

I sense a sly grin here ... you already found something, didn't you?

Coverage starts on page 257.

Mike

No, I didn't compare as such, but I thought it suspicious on page 263 it says that a page-crossing branch has no penalty in native mode. On reflection, maybe that's expected - 16bit arithmetic in a single cycle.

I see there's a cycle-by-cycle tabulation on 267 - I don't think we had one for the '816 before. It shows for example that JSR performs the stack pushes in different cycles than does the '02.

Cheers
Ed

There is no page-crossing penalty in native mode, so page 263 is correct. If in emulation mode, the page-crossing penalty does apply.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

The WDC '816 datasheet has one, namely Table 5-7. But, as you say, it's good to have a "second opinion," especially since WDC doc is so typo-prone. Good score! Thanks for posting.

-- Jeff

_________________
In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Oops - you can tell I didn't have the energy to revisit WDC's datasheet!

At 62 pages long the data sheet for the w65c265 is like a novella. It took me several sitting to get through it:

http://www.mouser.com/ds/2/436/w65c265s-2125.pdf

It's too bad that WDC's µcontrollers have mask-programmed ROM. It would have been better to have more on-board RAM with a simple means of attaching an external ROM. Otherwise, it's tempting to have all that hardware in a single device.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

I agree more internal RAM would be handy, even with the masked ROM. There's a bit in one of the control registers that disables the internal ROM, so that's fixable. On the WDC web site they have the spec for a developer board which would make a nice starting point for an SBC project using this MCU:

http://www.westerndesigncenter.com/wdc/ ... 65c265.cfm