It appears that the consensus is that 6k8 ohm pull down resistors are not there for termination of a transmission line. It is too high a resistance to have an impact on any signal reflections that may exist on the bus during normal operations.
As others have indicated, the current input into a TTL input pin, usually implemented with NPN Bipolar Junction Transistors (BJTs) and associated with logic high input signals, is significantly lower than the current output from a TTL input pin, i.e. a logic low input signal. TTL gates also exhibit a greater signal range associated with a logic high, 2.6V (2.4V ... 5V), than they do for a logic low, 0.8V. These two factors should lead most designers to implement pull ups for most signals when using TTL.
Non TTL-compatible CMOS logic exhibits much more symmetric signal ranges for logic high and low values; typically around 1V for a logic high and 0.8V for a logic low. The complementary nature of the insulated gate Field Effect Transistors (IGFETs) used for the input pin in CMOS logic also means that the magnitude of the currents into and out of CMOS logic input pins are much lower than those for TTL. Thus, with CMOS logic it is more reasonable to see busses pulled high or pulled low, especially with high value 6k8 ohm resistors.
I prefer to pull busses high primarily because the resistance required is much higher. This means that during normal operations, the average current supplied by the pull up resistors is much lower. To ensure that the steady state logic low value is less than 0.8V, a significantly lower pull down resistor is needed which results in much higher operating currents. The higher operating current needs of a pulled down bus does not contribute much to signal integrity, and it can negatively impact the transition time of signals because less current is available to charge/discharge the line capacitance.
Sometimes pull down termination is unavoidable, but I think that pull up termination is preferred.
One reason to passively terminate a bus is to ensure that if there are no "responders" to a bus transaction, the default value of the bus is a halt code of some sort. The instruction set of most microprocessors was not designed with this in mind. When would the processor ever be made to read a non-existent address?
However, the opcode for the BRK instruction of the 6502 is 0x00. This may be reason enough to pull the bus down. If the processor attempts to read instructions from unimplemented memory, the pull down resistors will yield a BRK opcode. A BRK trap subroutine could then be used to map out installed memory and I/O devices.
I don't expect that this is the use in your computer of the pull down resistors. However, it is also possible to achieve this type of behavior by using pull ups and inverting bus transceivers. In many early systems, you will find that many busses where implemented using inverting bus drivers, i.e. PDP 11 Unibus and others. In many of those early systems the halt code was a logic 0. In addition, TTL inverters use one less transistor in the output signal path. This makes the inverting buffer faster than the non-inverting buffer.
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