The original 6502 has a few 'no connection' pins (5. 35 & 36). Anyone know if these are actually wired internally to the silicon or truly not connected to anything?

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

I've wondered that about many ICs, because if they're truly not connected, you can use the hole as a via to save board space, or, in the case of SMT, use the pad area to get another connection across the area, if the spaces between pads are already taken. On some ICs, the NC's are used for testing at the factory but the customer shouldn't be connecting to them. When in doubt, you can cut the pin off to avoid trouble in one-off designs, but that's not practical for production. (I don't know the specific answer to the question though.)

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

On a newer datasheet for a Synchronous Ram I'm using they are sure to mention NC = 'not connected to the die'. I routed traces directly under some of those pins.

Sorry this doesn't answer your question about the 6502 NCs though...

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Pin 35 of the 65C02 DIP package is labeled NC. It is later noted in the 65C02 data sheet:

3.7 No Connect (NC)
The No Connect (NC) pins are not connected internally and should not be connected externally.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

In some of the monochrome Commodore motherboards, pin 5 was used for "NOROM": they had an expansion board that plugged into the 6502 socket to run the machine on a different CPU and/or with extra memory, and to keep the ROMs from being selected, NOROM could be activated so the RAM and/or ROM on the expansion board could be mapped to memory locations that were normally used for ROM. And remember, Commodore (MOS Technology) made the 6502.

I think the Apple 1 did something similar: it was compatible with the 6800 if you soldered some extra hardware on it to generate some extra clock signals and stuff. On the 6800 the extra signals were connected to some of the 6502 NC pins. I don't know the details about this.

Bottom line: for the original 6502 there's probably not much risk if you use the pins for something else (e.g. to plug something else in the socket). For the 65C02, it might be a different story and the WDC 65C02S is not totally pin compatible with the other 6502's. So the general rule is probably: NC means don't connect anything, but if you know what you're doing: have at it

===Jac

I'm trying to take Mike's 3-chip circuit to the next level by building a circuit that will accept a 6502, 65C02 or 65C816 and either a 128K or 512K SRAM.

Most of the key pins are the same but their are a few where the PIC will need to reconfigure dynamically pins as inputs or outputs to match the installed device and a small number of external components might be needed (e.g. pull up/downs).

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs