Hi, I am building a 6502 emulator from scratch. I am fairly new to 6502
machine language. My question is related to the SBC instruction and the Overflow flag.

SEC
LDA #$03
SBC #$F3

Is this correct?

Accumulator = $10
Zero = 0
Carry = 0
Negative = 0
Overflow = 0

My understanding is the Overflow flag should be set if the result is greater than
127 or less than -128. To me this seems ambiguous because if #$F3 is unsigned (243),
then the result would be 3 - 243 = -240 so the Overflow flag should be set. If #$F3 is
signed (-13), then the result is 3 - - 13 = 16 thus the Overflow flag should not be set.

What am I misunderstanding?

Thank you,

Chris

Indeed, no overflow. The overflow flag is all about signed arithmetic, so think of all the arguments as signed. As you note, that means you are subtracting a small negative value. Note also that SBC is exactly like ADC except the operand is inverted. SBC #$f3 is just like ADC #$c.

For testing short programs, try http://skilldrick.github.io/easy6502/ and for a second opinion paste the hex code into visual6502 like this:
http://visual6502.org/JSSim/expert.html ... 03e9f3eaea

See also http://www.6502.org/tutorials/vflag.html

Oh, and welcome!

Cheers
Ed

If you add two positive numbers and get a negative result (MSB=1), that is an overflow condition. Similarly, if you add two negative numbers and get a positive result (MSB=0), that is an overflow. (If you add a positive number and a negative number, you cannot get an overflow condition.)

There's a fairly good explanation here: http://teaching.idallen.com/cst8214/08w ... erflow.txt When designing hardware, the "method 2" is normally used -- comparing the carry into bit 7 with the carry out of bit 7. When writing software, you don't have access to that internal carry bit, so you have to use his "method 1" -- examining the signs of the two operands, and the sign of the result.

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Because there are never enough Forth implementations: http://www.camelforth.com

Thank you for the very imformative responses!

cgillies:

Since your aim is to write a simulator for the 6502, Klaus Dormann (Klaus2M5) has released a very comprehensive test program for the 6502 that you may want to consider using for validating your simulator. It has been very helpful to me in helping isolate the last few deficiencies in my 65C02 FPGA core. I have greater confidence in my core after using his test program. I histogrammed its test cases, and it covers all 6502 instructions and addressing modes.

You can find it on his GitHUB repository. He's also provided some extended test programs for the 65C02 opcodes and addressing modes in the event you decide to take your simulator in that direction as well.

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Michael A.

MichaelM - thank you for your post. That test program will be extremely helpful for me. I am almost to the point were I will use it. I just have to implement a few more instructions and their corresponding unit tests!