Klaus2m5 wrote:
If it is for slave selects of an SPI interface there is another option. Have you ever looked at a 3 to 8 decoder chip?
The 74HC137 seems to be ideal as it has a latch with low strobe (GL) and decodes 3 bits into 8 with enable. So you could have $x0-$x7 selecting the slave and any of $x8-$xF disabling the slave select (A-C=A0-2, G2=A3, G1=1).
I'm familiar with the '138/'238 and '139 but I've never looked at the '137. Thank you. I'll grab the Datasheet.
Quote:
However, as with the 573 data must be valid for the whole duration of chip select but CS is now active low. A chip select to write a latch is not required to be active for the whole duration of PH2, but for any time inside the period where data is valid. So a short strobe generated by the PIC will do.
This deserves a closer look. Thank you, Klaus.