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PostPosted: Fri Jan 03, 2014 9:48 am 
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Location: The Netherlands
Thanks for the explanation, that’s even worse than I thought!

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PostPosted: Fri Jan 03, 2014 10:04 am 
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I looked into this in 2006 and ended up modelling the single stepping logic circuit in the one of the MOS manuals as a CUPL definition for a 16V8 GAL.

I'll try to dig up the definitions.

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6502 & PIC Stuff - http://www.obelisk.me.uk/
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Open Source Projects - https://github.com/andrew-jacobs


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PostPosted: Fri Jan 03, 2014 10:25 am 
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Found it
Code:
Name     Debugger ;
PartNo   00 ;
Date     16/08/2006 ;
Revision 01 ;
Designer Engineer ;
Company  Andrew Jacobs ;
Assembly None ;
Location  ;
Device   G16V8 ;

pin 1      = clk;

pin 2      = sync;

pin 4      = run;
pin 5      = step;
pin 6     = cycle;
pin 7      = !rst;

pin 12      = rdy;
pin 13      = stop;

pin [14..16]   = [q2..0];

field state = [q2..0];

$define STOPPED   'b'000
$define RUNNING   'b'001
$define RUNNING_END   'b'010
$define STEPPING   'b'011
$define STEPPING_END   'b'100
$define CYCLING   'b'101
$define CYCLING_END   'b'110
$define SPARE      'b'111

rdy      = state:[RUNNING,RUNNING_END,STEPPING,CYCLING];
stop      = state:[STOPPED,STEPPING_END,CYCLING_END];

q2.d      = !rst &         !run & !step &  cycle & !q2 & !q1 & !q0
      # !rst &  sync &                         !q2 &  q1 &  q0
      # !rst &                 step &           q2 & !q1 & !q0
      # !rst &                                  q2 & !q1 &  q0
      # !rst &                         cycle &  q2 &  q1 & !q0;

q1.d      = !rst &         !run &  step & !cycle & !q2 & !q1 & !q0
      # !rst &         !run &                  !q2 & !q1 &  q0
      # !rst & !sync &                         !q2 &  q1 & !q0
      # !rst &  sync &            !q2 &  q1 &  q0
      # !rst &                q2 & !q1 &  q0
      # !rst &                         cycle &  q2 &  q1 & !q0;

q0.d      = !rst &          run & !step & !cycle &   !q2 & !q1 & !q0
      # !rst &         !run &  step & !cycle & !q2 & !q1 & !q0
      # !rst &         !run & !step &  cycle & !q2 & !q1 & !q0
      # !rst &          run                  & !q2 & !q1 &  q0
      # !rst & !sync &                         !q2 &  q1 &  q0;


/*
Sequenced state {
present STOPPED
   if     run & !step & !cycle   next   RUNNING;
   if   !run &  step & !cycle   next   STEPPING;
   if   !run & !step &  cycle   next   CYCLING;   
   next   STOPPED;

present RUNNING
   if   rst      next   STOPPED;
   if   !run      next   RUNNING_END;
   next   RUNNING;

present RUNNING_END
   if   rst      next   STOPPED;
   if   sync      next   STOPPED;
   next   RUNNING_END;

present STEPPING
   if   rst      next   STOPPED;
   if   sync      next   STEPPING_END;
   next   STEPPING_END;

present STEPPING_END
   if   rst      next   STOPPED;
   if   !step      next   STOPPED;
   next   STEPPING_END;

present CYCLING
   if   rst      next   STOPPED;
   next   CYCLING_END;
   
present CYCLING_END
   if   rst      next   STOPPED;
   if   !cycle      next   STOPPED;
   next   CYCLING_END;

present SPARE
   next         STOPPED;
}
*/

I don't think I could get the state machine to compiler properly so I ended up doing it with straight logic expressions.

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6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs


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PostPosted: Fri Jan 03, 2014 11:32 am 
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Location: Michigan, USA
GARTHWILSON wrote:
lordbubsy wrote:
In theory perhaps you and I are right, and if I’m not mistaken, for a 1MHz system that would likely work if the AVR or PIC is running fast enough(16 or 20MHz). However, I believe what BitWise is saying, is that a PIC or AVR isn’t fast enough to detect and react on the 6502 / W65C134S BUS signals. With a faster system it simply wouldn’t work.

A 16MHz PIC would have only two instruction cycles per half cycle of a 1MHz 6502, probably not enough to do anything useful. A one-word forward conditional branch on a PIC takes two of these instruction cycles (8 clocks), and a longer one takes two instructions and three instruction cycles (12 clocks); so if the PIC has to watch for a condition on even a single bit and branch on it, it's already out of time before doing anything useful.

I should probably ask which 6502 variant we're talking about. If we're talking about the NMOS 6502, you can't stop the PHI0 clock, correct? How about the R65C02 though? If I'm using a PIC to supply an R65C02 with a 1-MHz PHI0 clock, I can stop it any time while PHI0 is high. Then, while stopped, I should be able to run the R65C02 through a single cycle by taking the PHI0 output low and then high again. That single-cycle PHI0 clock doesn't have to be 1-MHz, does it?


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PostPosted: Fri Jan 03, 2014 6:30 pm 
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Right. The CMOS R65C02 can go down to DC, as long as the phase-0-low time doesn't exceed 5 microseconds. WDC's 65c02 can be stopped indefinitely in either phase though.

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PostPosted: Sat Jan 04, 2014 9:04 am 
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Joined: Sun Oct 13, 2013 2:58 pm
Posts: 491
Location: Switzerland
I already use AVRs as keyboard decoders (so I can use PS/2 keyboards) and currently I'm trying to create a AVR based VGA Video Card to interface with the 6502 bus (for simple text only). But about 2 months ago I actually had the same idea to use a AVR as a glue to the rest of the world. I not only wanted to create the various clock signals but also give the 6502 access to the IO of the AVR microcomputer and eventually emulate the "BOOT"-ROM. Of course for fast 6502 systems a AVR in no way can catch up with the handling of the bus signals. But when using a CMOS based 6502 CPU you have various options as already mentioned, e.g. stopping the clock, or add a small circuit that pulls RDY low until the AVR has done the job and releases the 6502 CPU again. So whenever the 6502 accesses memory locations that are handled by the AVR it will be paused.

By using a MCU (if PIC or AVR is not important) together with a wait state generation circuit you could replace oscillators, ROM, IO, reset circuit etc. and you could even extend it to use the MCU during the debugging of the 6502 system. That's when the BE signal comes in very handy. And if you use a baud-rate X-TAL (14,7456MHz 18,4320MHz etc.) on the MCU as already stated you can have accurate clocks for serial lines.


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