I'm putting together a fairly minimal SBC and would like some thoughts on it. I'm having boards made and would like them to work. Normally I wouldn't mind a few bodge wires, but one board will be a gift to my little brother.
It's nothing fancy, just the basics with a serial interface and a little IO. I've check it carefully, but it is my first design and I'm worried.
I've attached a png of the schematic. Hopefully it's legible. Does anyone see any obvious faults?

Thanks.

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I've actually been reading your 6502 primer and really enjoying it. I had no idea you were active on this forum. Too cool!

SV1 is an IDE style, polarized connector. SV2 is normal .1" headers. Both need at least ground, though.

I read about avoiding running the cpu connections off the board. I have no plans to use the connector, but I figure the buses should be broken out. I'm only going to 4MHz anyway.

Damn good call on PHI2. It was a separate net and I didn't spot it.

RAM is good old 6264. I chose it for the extra CE. I saves me NANDing in the clock. The Micro Kim does the same thing.

I've never needed handshaking in the past and no builds seem to use it. I was planning on running a terminal and using a serial to usb adapter. They cheapie chinese ones only have Rx and Tx anyway.
Didn't think about the MAX3232 fighting for Rx. I'll just put in a jumper.

I'm going to read what you linked and come back with an updated schematic.

Thanks!

In addition to Garth's comments:

1- Do not tie pin 1 (VPB) of the W65C02 to ground. Consult the datasheet if you intend to use the signal output, but if not, let it float.

2- You don't specify "which" 6522 you are using. Note that the W65C22S has a totem-pole driver for the IRQ line and would require a diode for your use. Also, you might want to add a jumper to select either NMI or IRQ (same for the 6551).

3- I would add more bypass caps... can oscillators could each use one, any connector you supply power to as well.

Some other thoughts, replace the reset chip with a DS1813 (TO-92 case) and use a 5-resistor SIP for the pull-ups (RESET, NMI, IRQ, RDY, BE). Perhaps a couple extra memory sockets would be useful to add more ROM/RAM (8KB on each seems light).

_________________
Regards, KM
https://github.com/floobydust

Thanks for the input. I've updated and attached my schematic. I've added jumpers, capacitors, power connections, a ds1813 and actual part numbers. It's all Rockwell's "C" line, really.

The ds1813 is a pretty nice little ic. Much smaller and I was only using the reset feature of the other chip anyway.
I decided against using a resistor network because my board is incredibly cramped and I had to cram some resistors under the CPU. It's a big auto-routed mess, but I can't stomach doing it by hand.

The RAM/ROM is skimpy, but I'm planning around it. I've written a monitor program in the past and it was well under 8k. It just needs to load programs over the UART or from a serial EEPROM.
I figure with RAM I can go up instead of out. If I need, start piggybacking 8ks and wiring them to the decoder. Or those funny half width ics might give me room for another chip. Have to see if 6264 comes in that package.

I spotted a few other things that may bear consideration:

1. Replace the 74LS138 with a 74AC138 or 74HC138. You're trying to use TTL logic in a system that appears to be all CMOS. Also, the 'LS138 is slow hardware.
   
   
2. You are qualifying CS2 on the SRAM with the Ø2 output of the microprocessor (MPU). That's incorrect design, as chip selects should not be slaved to the system clock. As you've already attached the SRAM's /CS1 input to the '138 decoder, CS2 can be tied to Vcc.
   
   
3. The use of the MPU's Ø1 and Ø2 outputs for anything is deprecated. All timing should be slaved off the clock generator and the Ø1 and Ø2 outputs should be a no-connect. They are present only to support operation in a system that originally had an NMOS MPU.
   
   
4. The MPU's SOB input should be tied to Vcc through a pullup resistor. You may find that input useful some day in adding a high-speed I/O function. I wished the 65C816 had it.
   
   
5. As designed, your circuit is vulnerable to corruption of RAM contents because you aren't qualifying the SRAM's /WE input with Ø2. With the 65C02, the data bus is never valid when Ø2 is low. 65xx I/O hardware (e.g., the 65C22) knows that, but non-65xx devices don't.
   
   
6. Similarly, you have tied the SRAM's /OE input to the /CS1 input. For maximum stability, /OE should be asserted only when both Ø2 and RWB are high. During Ø2 low the MPU does the bus and control line setups. It's possible that false selects may occur at that time and cause momentary data bus contention.
   
   
7. As you have it right now, you are creating the ambiguous condition of the SRAM's /OE and /WE being simultaneously low when writing to the device. Unless the device's data sheet says that /OE is a "don't care" when /WE is asserted, such operation is undefined and may cause the device to malfunction.
   
   
8. Your TIA-232 transceiver part identifier says MAX3232CPE. That probably should be MAX232CPE, eh?
   
   
9. Speaking of the MAX232, the correct value for the four charge pump capacitors is 1.0µf, not 0.1µf. The latter value is for the MAX232A only, which you should not be using. The charge pump capacitors should be tantalums for best performance. Alternatively, you can use low ESR electrolytics if you can't get the tantalums (BTW, the tantalums take up a lot less space). Also, place a 1.0µf tantalum as close as possible to the MAX232 and connect the cap to pins 16 (positive) and 15 (ground), respectively. See page 17 of the data sheet for details.
   
   
10. Part of your TIA-232 connector is wired in an ambiguous way. You have pin 6 (DTR?) wired to pin 4 (DSR?), but no apparent voltage source to set this connection to a proper level. Whose pinout are you using? Is this device supposed to be a DTE or DCE?
    
    
11. Bump C2's value to 100µf and be sure to use a low ESR cap. Place a 0.1µf cap in parallel with C2 and place both caps as close as physically possible to the power input jack.

_________________
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Yes, LSTTL may have trouble pulling up high enough for some CMOS to see the level as a solid "1". I've used LSTTL when it was all I had and I wanted to keep going before I'd be able to get a CMOS logic part, but I don't like to (although I always seemed to get away with it). Use CMOS if you can.


Fortunately he knew not to run phase 2 to the '138; so although his way is not the fastest-access way to do it (which is ok at 4MHz), it works with #5 to keep things safe as the RAM cannot be written when phase 2 is low.


It's ok, particularly as he's using Rockwell parts, not WDC. He's doing it the Rockwell way.


Not a bad idea. I have never used it and never will, but it doesn't cost a thing to leave the possibility. The '816 has the interrupt-on-WAIt which is much nicer.


It is effectively qualified by only letting it be active at all when phase 2 is up.


I just double-checked. The data sheet does say the OE\ is a don't-care pin when WE\ is low.


Maxim has lots of line driver/receiver ICs, and the 3232 is one of them. The data sheet is at http://datasheets.maximintegrated.com/e ... AX3241.pdf. But Skidlz, you have the capacitor at pin 6 drawn backwards. Make sure you install it correctly. (The curved side is negative, and the charge pump will put pin 6 well below ground.)


The 3232 data sheet does say to use .1's. Without looking at the details, I expect the oscillator frequency is a lot higher. SMT MLCCs have very low ESR, which works out better than electrolytics or probably even tantalums; but just a few years ago MLCC's in more than a fraction of a uF were very expensive or non-existent. Apparently the tantalum industry saw the usefulness and took advantage and jacked their prices way up; so the MLCC makers figured out they could make a suitable MLCC replacement for a whole lot less, and they pulled the rug out from under the tantalum industry. I know someone who "invested" in thousands of tantalums in values that were soon replaced by MLCCs, and then the tantalums' demand dropped like a rock. Now he's stuck with them.

floobydust's considerations are good too, but #1 & 2 don't apply to the Rockwell parts you're using. If you think you might someday want to use WDC's parts, it would be good to take these into consideration and plan ahead.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

For a recent project, I used 1uF MLCC in 0402 size. I also routinely use 1uF, 25V in 0603, as well as 10uF, 10V in 0603, quite reasonably priced, and I just saw in the catalog that they now sell 22uF, 10V in 0603. Things have improved a lot in recent years, and it certainly pays to keep checking the catalogs to see what else is becoming available.

Sorry, but back to pin 1 of the CPU. Your schematic shows a WDC part (pin 1 is VPB), which should float if not used. Now that you've specified you're using a Rockwell part, pin 1 is not VPB, but a power pin and should be grounded. Reset, you should still put a pull-up resistor on the line as multiple chips are being driven. While few have used the SO line, I used it for a WD2797 floppy controller back in the 80's, and it worked out well. A consideration is to route it to the expansion connector. I've not added a pull-up on my board for this line (floats) but I'm also using WDC CPUs. Note that the Vic-20 tied SO and RDY together and used a single pull-up resistor.

Saving more space:

1- half-size can oscillators would be a plus, and free up some board space.
2- Cypress make a 32KB 28-pin narrow DIP SRAM, this would also save some space (plus the additional RAM).
3- As you still need a pull-up resistor on Reset, still recommend a SIP package, they are very narrow.

Other suggestions:

1- If implementing the above, you should be able to fit a pair of 14-pin DIPs on the board and get a more complete I/O, Memory and R/W clocking implemented and have 32KB of RAM and ROM, less you're I/O page.
2- If you're planning to use a USB-Serial convertor for the 6551 as a console, you might consider one of the 9-pin D-shell FTDI devices, which mounts like a 9-pin D-shell but is a USB-Serial convertor and available with 5-volt TTL level interfacing, which would also eliminate the Max232 chip and assorted caps. You can still add a connector for off-board UART usage which would have the Max chip and standard 9-pin D-shell.

I know the latter is more of a design change, but you'll have a more flexible board in the end with the same footprint.

_________________
Regards, KM
https://github.com/floobydust

Ok. I've tried to take everything into account. New schematic attached. Half sized crystals osc, 2x narrow rams, sip resistors and no level shifter.
I changed up the io header so it is more straight-through and routes better. I also added the RTS/CTS connections. I figure the RTS out can be connected whether or not the receiver needs it, right? I used a CTS jumper, but I was wondering if I can get away with a pulldown resistor.
I also fixed a big problem. PHI2-IN and PHI2 were shorted.
Opted to remove the IRQ/NMI jumpers, just so I can route the board. It barely auto routes at 50mil. I've also attached the un-routed layout since it could use some improvement.

Those things are amazing. Do take into consideration however that their capacitance drops precipitously when you get above about 20% of the WVDC, so you might need a much higher voltage than you thought. At full rated voltage, the capacitance can be cut by 50-75%, or worse, for X7R. For Y5V, it's twice as bad, with significant capacitance drop beginning at only 10% of the WVDC and being reduced by 90% at WVDC. I don't know if I should post the magazine article here, but I can email it to you if you're interested.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Yes, I'm aware of that. I always look for 50V or higher, if at all possible. Of course, that's not always possible at the high end of the capacitance range.

Skidlz, you'll keep getting advice long after you don't want any more, but here's some more. Jumper options (even if it's a tiny wire in holes, instead of taking the space for pin headers) is always a good idea. One place for the option is the uP's pin 1, for the WDC vs. other manufacturers use of it. Another is the serial-port connections. (I've thought about doing a set complete enough to do a null-modem setup and other things so I never need to make up a special cable.) Do make sure you do something with the CTS. You can't leave it floating. I think Flooby was suggesting something like this one, whose data sheet is here.

Back on the SV1 connector: I would recommend distributing the power and ground connections something like this: ground on 8 & 33, and Vcc on 15 and 26. It makes it so the expansion board can be plugged in backwards and the power and ground connections will still be correct so you don't damage things. More importantly though, they are distributed such that the ground return path for any given signal line is not so far away. (Vcc pins should be bypassed to ground right at the connector, so AC-wise, they serve as ground also.) Having lots of them all bunched up at one end is not as good as having fewer but distributing them more evenly. Make sure you add the RST line on the connector.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Here goes: v4 is attached.
I think the real problems have been ironed out, but I wonder about the UART/RS232 connection. I want it wired so I can use my db-9 terminated FTDI cable and possibly an external level shifter, alternately. The option to forgo handshaking would be nice too. If this design accommodates that, I think I'm set.

Okay, so... the UART port from the 6551 is basically TTL levels (0v and +5V, for practical purposes). The standard DB-9 connector for async uses RS-232 voltage levels (-12 and +12). That's why you have the Maxim 232 type chips to convert the logic levels of the 6551 to RS-232 levels.

Now, the FTDI USB device I suggested (similar to what Garth linked) is basically designed as an upgrade to existing designs and can be sourced with either a male or female DB-9 pin-out. It's also available in 3 versions, one that natively interfaces to RS-232 levels (which Garth linked) and then two others designed to interface at 3.3V logic levels and 5.0V logic levels. The one I would recommend is this one:

http://www.mouser.com/ProductDetail/FTD ... yVDNan4%3d

Also, be sure to read the datasheet. These devices install in place of the DB-9 connector and interface to ALL of the standard serial port defined lines, i.e., RTS, CTS, RI, TxD, RxD, etc. On the pin side of the device is a mini-USB connector ( Note that NO Max232 chip is required for level conversion). The RS-232 version that Garth linked would require the Max232 chip between it and the 6551. In use, this (device) is the equivalent of your outboard USB-Serial device via a null-modem to the 6551. So in short, you don't have to do any special wiring to create your null-modem, it's already done at the device level. Again, please consult the data sheet before you consider your board design completed and make the decision on how you want your serial port configured.

28-pin narrow DIP RAM chips. Do check the datasheet for these as well (some lines are swapped around, albeit only address lines). Cypress do make an 8KB SRAM in this configuration, but it costs more than the 32KB SRAM in the same package.

Parallel ports: You've separated them on their own header, but as you've made Gnd on one and +5 on the other, you can't wire and use one separate from the other. In short, I would recommend you at least have a Gnd connection for each port and +5V would be nice, so you need an extra pin on each. Another option is to copy Daryl's parallel port pin-out from his SBC-2 board.

Hope this helps.

_________________
Regards, KM
https://github.com/floobydust