With the PCB layout I started over three times. But I think I’ve got it right now.
It’s pretty simple in address decoding and features. Only an ACIA for I/O.
This is mainly for experimenting and interfacing with the breadboard and will replace my current prototype.
The ATtiny delivers a clock of 3,6864 MHz. This is divided to 1,8432 MHz. for the ACIA and 0,9216 MHz. for PHI2. With a jumper, PHI2 can also be set to 1,8432 MHz.
There are buttons for reset, CPU stop and single instruction.
Code: Select all
Memory Map:
0000-BFFF RAM
BF00-BFFF I/O
C000-FFFF ROM
BF30-BF33 ACIA