Stack Pointer and Register Status After RESET

[andrewem]

Hi,

After a RESET is performed what is the value of the following registers and the stack pointer?

Accumulator
IX
IY
Processor Status Flags
Stack Pointer

The reason I'm asking is that I have conflicting sources of information and I was hoping there would be an expert on here who could help me out.

Thanks in advance,

Andrew

[GARTHWILSON]

Coming out of RESET, the interrupt-disable bit I is set, and if you have a CMOS 6502 (65c02), the decimal flag D is clear.  The other processor status bits are not specified to be one way or another, and the A, X, Y, and S (stack pointer) are not specified to have any particular value. SToP and WAIt instructions are cleared, and execution begins at the address pointed to by the reset vector at address FFFC-FFFD.

Your reset routine will typically have LDX #$FF, TXS so the stack pointer S starts at $1FF.  The stack grows down (1FE, 1FD, 1FC, etc..).  The high byte of the stack pointer is always 1 for the 6502/65c02.  If you have an NMOS 6502, a CLD will also typically be one of the first things in your reset routine.

[andrewem]

GARTHWILSON wrote:

The other processor status bits are not specified to be one way or another, and the A, X, Y, and S (stack pointer) are not specified to have any particular value.

Hey Garth,

A document from Western Design Center shows the RESET pushing the Program Counter and Processor Status Flags onto the stack... do you know if that is correct? Does a RESET push these registers onto the stack?

Also, when you say that they are not specified, do you mean that they can be any value? Or, do you mean that there is no supporting documentation to say what they are?

Thanks for the help,

Andrew

[GARTHWILSON]

> shows the RESET pushing the Program Counter and Processor Status
> Flags onto the stack... do you know if that is correct? Does a RESET
> push these registers onto the stack?

RESET is an interrupt of sorts, and I do seem to remember seeing it push these things onto the stack when I've done single-cycling experiments.  Maybe it could show you where the program counter was and what the status register were when you aborted a crashed condition by pressing the RESET button, but so far I've never had any reason to care.

> Also, when you say that they are not specified, do you mean that they
> can be any value? Or, do you mean that there is no supporting
> documentation to say what they are?

My answer would be B.  Some (time-consuming) experiments could show if the non-specified flags and registers would just retain the values they had when the RESET line went true if in fact RESET was used to recover from a crash, but that might not be very useful information.  If you're just powering up, I don't think you could count on any particular values being in those bits and registers.  It might be pretty consistent with one particular processor but different with another one of the same kind from a different production lot.  RAM is similar.  People have tried to use the random power-up values in for a random-number generator, but many RAMs are surprisingly consistent in what they power up with.

If you're rather new to this stuff, I would recommend just making your RESET routine initialize things the way you want them, and don't worry about what might have been there before initialization.  The point of the RESET routine is to set things up to begin operation, the bulk of that being I/O bit directions, timers and counters, initial variable values, etc..  You'll be changing the processor register values while doing this job anyway, so what was there earlier just doesn't matter in most cases.

[dclxvi]

GARTHWILSON wrote:

> shows the RESET pushing the Program Counter and Processor Status
> Flags onto the stack... do you know if that is correct? Does a RESET
> push these registers onto the stack?

RESET is an interrupt of sorts, and I do seem to remember seeing it push these things onto the stack when I've done single-cycling experiments.

It doesn't look like you can rely on the behavior, though. I ran a couple of quick experiments. With the following code, I pressed RESET once it got to the BNE loop.

Code: Select all

      LDX #$7F  ; clears Z flag, so BNE will branch
      TXS
LABEL BNE LABEL

The LDX #$7F is just to move the stack pointer out far enough so that once the stack pointer is reset, the initialization routines won't clobber the effect RESET has on the stack. The reset handler I used was:

Code: Select all

CLD
TSX
STX MEMORY
LDX #$FF
TXS
JMP RESET

On my 65C02, it appeared to push the PC and P register correctly at $17D to $17F. However, on my Synertek (NMOS) 6502, the stack pointer (stored in MEMORY) was $7C, but nothing got written to $017D to $017F. No matter what values I put there, they were never overwritten.

[John West]

andrewem wrote:

A document from Western Design Center shows the RESET pushing the Program Counter and Processor Status Flags onto the stack... do you know if that is correct? Does a RESET push these registers onto the stack?

Many years ago I had a logic analyser hooked up to my C64. The NMOS 6510 does a few cycles that look like it's pushing PC and P, but R/W is high so nothing gets written.

[J64C]

GARTHWILSON wrote:

Your reset routine will typically have LDX #$FF, TXS so the stack pointer S starts at $1FF. The stack grows down (1FE, 1FD, 1FC, etc..). The high byte of the stack pointer is always 1 for the 6502/65c02. If you have an NMOS 6502, a CLD will also typically be one of the first things in your reset routine.

Ahh! Sorry for the 20 year necro post. But, I think this has saved me posting a question.

I was wondering why the contents of my stack was randomly moving around after each reset. This looks like it will solve that mystery. Thanks Garth!

[GARTHWILSON]

Reviving old topics is never a problem.  If you have more material or questions to add and it's all about the same thing, it's better to keep it all together, for a few reasons.

See my treatise on 6502 stacks (plural, not just the page-1 hardware stack) at http://wilsonminesco.com/stacks/ .