Yes, r1 refers to the accumulator, the lower eight bits are the eight bit accumulator. The load byte instruction doesn't have and accumulator form. So it has to be specified as r1.

I'm pretty sure PHA/PLA are working properly. All the memory loads go through a single state. Most of the stores (except jsr, ) go through a single store state.

I tried increasing the clock frequency to see if I could make the problem worse, but it didn't have an affect.

The V_OUTP routine calls DisplayChar which is outputting a character to a text display.
Hmm, I see now that I don't mask off the high order bits when DisplayChar is called. I suppose there could be garbage in the high order bits when switching from eight bit mode. I'll have to try masking off the high order bits.

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Masking off high order bits fixed the problem. Strange that there was only the occasional problem when interrupts were enabled.

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I think that I'm starting to see a pattern in your problems. I hope that no other bugs turn up, but if they do, the first thing on the list should probably be to check if bits 8 to 31 are fouling the works somehow, somewhere.

Good luck.

Mike