Joined: Fri Aug 30, 2002 1:09 am
Posts: 8521
Location: Southern California
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I see BDD posted while I was writing and got pulled away for awhile, but I'll go ahead and post this anyway as it adds a few more things.
banedon wrote: I've got a 65C02 10MHz CPU on its way through the post. I plan to run it only at 2MHz for the moment (so under-clocking it). Unfortunately, I don't seem to be able to get hold of 65C22s - I have two 6522 originals instead. From what I can tell these should interface ok with the 65C02 as I think the 65C02 is TTL compatible.
Yes, they are compatible. We occasionally hear about how expensive it is to get these parts overseas because of shipping and insurance costs. I believe it was BitWise who recently did a bulk buy in England to amortize this cost over many ICs for those over there wanting to use them. Hopefully he will see this and speak up; otherwise you might want to contact him and see if he still has some to sell. To us in the States, the 14MHz parts (which typically top out at 25MHz with good construction and fast-enough supporting parts) are easily available and the shipping cost is minor. They are in production.
Quote: The address decoding alternative you mention looks interesting as I had a concern that with my present system I would be mapping 2 pages to I/O with one VIA which is a bit of a waste. I'll definitely consider swapping that over.
It is a waste only if you are needing all the memory you can get in the 64K address space; but your diagram shows 32K of RAM and only 8K of ROM, leaving lots of address space open for I/O. You could double the ROM space and still use the second diagram at http://wilsonminesco.com/6502primer/addr_decoding.html .
Daryl (8BIT here on the forum) offers an address-decoding GAL (generic array logic, which is programmable logic) in a 24-pin DIP that gives you 32K of ROM, (almost) 32K of RAM, and I/O space for four I/O ICs taken out of RAM space at $200-2FF. See http://sbc.rictor.org/decoder.html .
Quote: EPROM/EEPROM-wise my main issue with EPROMs is that I don't have a UV box to erase them and I genuinely thought they were old-school and obsolete. EEPROMs look far more attractive as one can easily re-write them - even from inside the 6502 system if wired that way (I don't plan to do this - over writing ones running OS ROM is a bad idea  ).
EPROM is kind of old-school, but is still available in higher densities than EEPROM is. EPROM is available up to 2Mx8. Flash is available in much, much greater densities, but it's usually serial, not something you can put directly on a 6502 bus. There are certain tools you need to get a system going, and an EPROM eraser at $40 is not as expensive as say the programmer, unless you make the programmer a manually operated one like I did for my first one, decades ago, when I didn't have any computer yet to connect a programmer to anyway. It was so slow and prone to human error that it was nearly useless. My $40 eraser only does 4 parts at once, unlike some of the more-expensive ones, but I cycle them through so that another one is ready every 3-4 minutes, so the delay is hardly an issue. It takes that long or more to find your bug and fix it in the source code and re-assemble and re-program anyway.
EEPROMs can be re-written in-system, but note that you cannot read the EEPROM while it's programming, so your code that keeps checking to see when it's done must be run from RAM (or at least a different EEPROM) before jumping back to any routines in the EEPROM you were programming.
Quote: I see what you mean on the 6502 unused pins. I did plan to tie them high or low, but hadn't quite done my research on those pins so didn't know if I needed them elsewhere first. Quick (and very basic) question: I see many people tie IC pin to VCC/VDD without a 3K resistor, but others do use a resistor. Looking at the 3K/3.3K I can see it limits the current to about 1mA. Is this resistor used to protect the pin from being damaged in some way? I.e. drawing too much current?
The main one to do this on is RDY on WDC 65c02's, because it gets pulled low internally on a WAI instruction. Even if you don't plan to use WAI, a software bug could cause data to appear as a WAI instruction to execute, and the processor would stop with RDY being pulled down; so you don't want it connected directly to VDD.
Related, there's pin 1 of the 40-pin DIP which used to be a second ground pin but is a VP\ (vector-pull not, or vector-pull bar) output on WDC's 65c02. This will be high most of the time and get pulled low internally only when vectors are being pulled from the FFFA-FFFF address area. Since it is normally pulled up internally, you don't want to ground it. What some people have done when they needed to plug a WDC 65c02 into a legacy board is to just bend that pin out so it doesn't make connection in the socket.
Quote: I've adjusted by [my?] schematic to have the 6522 VIA so it's Ø goes directly to the crystal/oscillator circuit. What kind of problems does it cause to use the one outputted by the 6502? Just curious.
I've always gone with the older method of having the processor's Φ2 output go to the system, and it always worked fine although I stopped at 7MHz due to 4MHz I/O parts and slow EPROM. WDC recently started recommending that the whole system be driven from the Φ2 input (sometimes called Φ0). When I get around to trying to push the speed limits on the processor using faster parts, I would like to use variable delay-line ICs made by Data Delay Devices to experiment to find the best timings. For now, just figure there is a slight delay between the Φ0 input and Φ2 output of the processor, and although the Φ0-Φ1-Φ2 circuit and old way of connecting things will still work, WDC no longer tests or guarantees these delays. Their timing specifications (as well as DC specifications) are quite conservative though, and in most cases there's a lot more margin than they let on. I won't go into all the implications here, but I don't think it's very significant for simple systems running at your speeds.
Quote: Would you recommend 74HCT (rather than 74HC) for added TTL support?
It wouldn't hurt, but if the logic's inputs are all connected to processor outputs, it won't matter, since the CMOS processors can pull all the way up to 5V if the load is light. In fact, I found out by experimenting, that the WDC 65c22 outputs can pull up to 4.2V with a 19mA load, and I believe the output pin drivers on WDC's 65c02 are the same circuit. This is another place where the data sheet does not let on how much more they give you than they say they do.
Quote: Communications-wise I mean for the system to do the following:
Have a means of input - either keyboard input or from a PC - both would use RS232 unless anyone has a better way. WOuld I be better attaching the RS232 via the 6522 VIA or directly on to the system (perhaps via a buffer)?
The 6522's shift-register port is not RS-232-compatible. There are certain jury rigs that can be done with it, like the output method mentioned in viewtopic.php?f=7&t=342 if you scroll down to "Tip of the day, #6".
You can also bit-bang, but that's kind of a pain because of RS-232's (or TIA-232's, in the newest standards, but I don't think it will make any difference to your application) stringent timing requirements.
The 6522's serial port is synchronous serial, meaning there's a separate clock line, whereas RS-232 is asynchronous serial, meaning the timing (ie, how long since the beginning of the start bit) is the only thing that tells the receiver which bit the data line is on at any given instant. The popular synchronous-serial methods of I²C, SPI, and Microwire are very easy to bit-bang (which I show on the potpourri page with links also to generic sample 6502 code), and even interrupts cutting in on the process won't cause problems, because the individual bits are coordinated by the separate clock line, not numbers of microseconds of delay.
The practical way to get RS-232 timing then is to use a UART or ACIA IC like the 65c51, 26c92, or 16550. Another possibility I might use next (which I've exercised before just to see it work, but have not put it into regular service) is the 14-pin-DIP MAX3100 UART which I interfaced to the 65c22 by SPI. The reasons for using these are:- as already mentioned, easily meeting the strict timing requirements of RS-232,
- the fact that RS-232's bit order is the reverse of synchronous-serial interfaces including the 6522's serial port, and
- adding the start and stop bits (and optional parity), and checking these for error conditions.
There might be another reason I'm forgetting at the moment.
Quote: Have a means of displaying results. This would initially probably be something very basic such an 8-bit LED array or perhaps 7-segment LEDs.
Again the intelligent character LCDs mentioned on the displays page of the 6502 primer are an easier way to get a small display.
- They take care of the character generation so your software doesn't have to look up dots or segments (unless you want to form custom characters),
- they take care of the dot row & column strobing so your software doesn't have to do that either like it would with 7-segment LED displays,
- they offer full alphanumeric (unlike 7-segment where many characters would have to be severely jury-rigged, like % $ & etc.)
- they offer a couple of types of blinking cursors so your software doesn't have to babysit that either,
- they can be interfaced with as few as six I/O bits (and some are serial interfaceable), and
- they are very low-power, unlike the LEDs.
I show a circuit for interfacing one of these at http://wilsonminesco.com/6502primer/potpourri.html#LCD with a link to sample 6502 code to work it.
Quote: A bit later I'm going to add my second 6522 VIA to the system and the output the A & B ports to IDC connectors so I can add I/O modules.
I would build the board with the second VIA socket connected right from the start, as it's harder to add this as an afterthought. I would recommend making the pin header pin-out as shown at the right end of the diagram at http://wilsonminesco.com/6502primer/pot ... ml#BAS_CPU so that if you accidentally plug the IDC on backwards, you're probably not going to hurt anything. BDD alluded to the fact that implementing plug-in boards is not trivial. I would follow up on that by recommending that you not run the processor's own buses off the main board at all. I give reasons for this, and ways to get more practical interfacing for less time and expense and penalties, at http://wilsonminesco.com/6502primer/ExpBusIntrfc.html .
BigDumbDinosaur wrote: Food for future thought: you can rig up a simple "network" using the 65C22's serial shift register. Garth discusses that in some posts here and there.
He might be referring to SS22 which I do use on the workbench.
Quote: The 65C22's eight bit parallel ports are useful for a variety of I/O tasks. A little adroit programming can make port-A behave like a Centronics port that can drive a standard parallel printer.
I address this a little at http://wilsonminesco.com/6502primer/potpourri.html#LPT . On my workbench computer, I do a lot of bit-sharing on especially the first 65c22 (VIA1), and the printer port shares bits with the LCD interface, keypad, and oscilloscope raster graphics. My diagram for it is at http://wilsonminesco.com/6502primer/IO_ICs.html but it's kind of hard to read. I was cleaning it up for the web page many years after I drew it but it was taking way too long to get it really readable.
_________________ http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?
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