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PostPosted: Tue Aug 20, 2013 1:53 am 
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I recently designed PCB (my first ever) for a project I've been working on. It is for a video game console based on the Atari 2600's video chip, basically an extension of the original hardware. Before I made the PCB I made a prototype by wiring together all the parts on a perf board which works well. Unfortunately there are issues with the PCB and it does not work at all. I'm going to check all the connections with my multimeter to see if they are correct, but I wanted to see if anyone had any tips for debugging this sort of thing. I have a suspicion that the traces on the board are too thin, they are something like 10 mills thick, and that is for all traces including power. It may be worth noting that I have a 2 channel scope.

Anyway, I appreciate any guidance you could provide!

Here is a picture of the board for kicks


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PostPosted: Tue Aug 20, 2013 2:10 am 
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A good place to start would be with a NOP generator.

BTW, is that tantalum the only bypass cap on your 5 volt supply? (I assume it's on the 5V supply.) If so, that could exacerbate any problem relating to the skinny power traces you mention. Ideally you want short, wide power traces, and, for each IC, a small (.1 or .01 uF) cap located physically close by. You might get by without one or the other, but it looks as if you're maybe missing both.

cheers,
Jeff

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Last edited by Dr Jefyll on Tue Aug 20, 2013 2:34 am, edited 1 time in total.

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PostPosted: Tue Aug 20, 2013 2:21 am 
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Looks pretty good overall. I see some solder smearing near the tantalum cap in the center of the board. Check to make that there are no shorts. Sometimes the solder mask is not as good as should be.

When I have this problem, I start with the bare minimum. Remove all socketed devices except the processor and the CPLD, which appears to be a Lattice part. I don't see a crystal oscillator on the w65c02s, first thing I would check are the voltages, and then the quality of the oscillator by checking Phi1O and Phi2O. I thought I read that the w65c02s requires a clock oscillator. Have you checked that it can work with a crystal or RC timing source?

Assuming that Phi1O and Phi2O are clean, and that the bus is not floating low, I would a BRA * program in location $FFFA and $FFFB, and then point the resetr vector to $FFFA. Then check the address lines to see if all but A2, A1, and A0 are high. The last three address lines should be changing state. You should be able to use A0 as a trigger, and use your other probe to check out the other address lines.

With this simple program, which you can extend, you've tested a significant number of the address lines, the CPLD decode logic, and the most of the data lines. It should stay in this program sequence forever. You can expand this little program to expand the number of address lines that you verify.

Finally, make sure the simple things like nNMI and nIRQ are not asserted. Also check, with the scope that nRST is going low and then high with a fast enough edge rate. nRST should be low for enough time to let the oscillator stabilized.

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PostPosted: Tue Aug 20, 2013 2:38 am 
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Wickeycolumbus wrote:
but I wanted to see if anyone had any tips for debugging this sort of thing.

It's too late to do this on this one now, but before you get a board made, follow the checking method I describe at viewtopic.php?f=1&t=1888&p=17653#p17653.

Start with my debugging tips at http://wilsonminesco.com/6502primer/debug.html .

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I have a suspicion that the traces on the board are too thin, they are something like 10 mills thick, and that is for all traces including power.

That's not a problem. I usually make them narrower. I have a six-layer .031"-thick bare board here for a credit-card-sized PCMCIA hard-disc drive (remember PCMCIA?) whose traces look like about .004".

Are there any bridges between those vias just to the right of pins 16 & 17 of the 6502?

The big green capacitors are fine for audio work, but not digital, because they have too much inductance. Use monolithic ceramic capacitors, and make the leads as short as possible. (That may not be your biggest problem keeping it from working at all though.)

What are all the capacitors in the upper-right corner for? If they're on the I/O, keep in mind that when output pins change state and have to suddenly charge or discharge those capacitors, it will put a huge jolt of current on the IC's power and ground pins, making the references for everything else jump. Not recommended.

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PostPosted: Tue Aug 20, 2013 5:05 am 
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If possible, please post the schematic you used. Also, what is generating the clock signal for the 65C02? You really should be using a can oscillator for that purpose, per WDC's recommendations. To quote their data sheet:

    3.8 Phase 2 In (PHI2), Phase 2 Out (PHI2O) and Phase 1 Out (PHI1O)

    Phase 2 In (PHI2) is the system clock input to the microprocessor internal clock. During the low power Standby Mode, PHI2 can be held in either high or low state to preserve the contents of internal registers since the microprocessor is a fully static design. The Phase 2 Out (PHI2O) signal is generated from PHI2. Phase 1 Out (PHI1O) is the inverted PHI2 signal. An external oscillator is recommended for driving PHI2 and used for the main system clock. All production test timing is based on PHI2. PHI2O and PHI1O were used in older systems for system timing and internal oscillators when an external crystal was used.

That is from page 10 (with emphasis added). Although it doesn't appear to be officially published anywhere, I recall from some years back that the 65C02 (and more-so the 65C816) is somewhat fussy about the quality of the Ø2 clock, specifically the rise and fall time. Your best bet is to use a can oscillator placed as close to pin 37 on the 'C02 as possible to minimize waveform distortion.

Aside from the clock, I see a few "boogers" on the PCB right near pin 1 of the unlabeled chip that is horizontally mounted. Could they be solder splashes between adjacent via?

Lastly, and as noted above, each chip should have a bypass capacitor closely mounted. A good choice for that is 0.1 µF at 50 volts, a ceramic X7R type. A 100 µF low ESR electrolytic should be placed right at the power input jack as well. The skinny power and ground traces aren't helping any. 10 mils is fine for data circuits—I used 6 mil traces on my POC unit, but power and ground traces should be fat.

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PostPosted: Wed Aug 21, 2013 1:56 am 
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Thanks for all the input, I'm starting to go through all the suggestions. I noticed today that when I probe ground pins on the ICs, there is some serious noise going on, in some cases +/- 150 mV. The VCCs all very flat and seem fine though.

The clock circuit etched into the board turned out to be incorrect so I made a separate circuit and wired it to the bottom. The clock output looks fine and I have used it in an old Atari 2600 with success. The solder mess on the top of the PCB is where the old clock circuit was and doesn't seem to have any shorts.

I also added a copper board connected to the grounds of the ICs. Just to see what would happen, I put a random capacitor I had laying around between the ground plate and +5 V. I'm still getting a ton of noise with these modifications. Perhaps I should try to power it with an external supply?

I'm sure the power supply circuit is horribly inadequate, I copied the simplest 7805 based circuit I could find (schematic here: http://i.stack.imgur.com/yeKoT.gif ). This whole project was rushed and limited by the free version of Eagle's restrictions, and of course my lack of knowledge of PCB design and Eagle cad. Once I got the autorouter to spit out a 100% completed layout, I went with it! I could post the schematic and board layout, but they are very very ugly. Rather than designing a new chip icon for each new library, I just copied a library with the same package type and re-purposed all the pins, so the ICs look a bit off. Also there are no wire connections between anything, only points I named and connected. There are no component values on the schematic either.

Attached is a picture of the bottom of the board, which probably looks hilarious to some of you guys :oops: It is a prototype after all :lol:

Anyway, thanks a lot for everything, hopefully we can get this thing working!


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PostPosted: Wed Aug 21, 2013 2:38 am 
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Wickeycolumbus wrote:
I also added a copper board connected to the grounds of the ICs. Just to see what would happen, I put a random capacitor I had laying around between the ground plate and +5 V. I'm still getting a ton of noise with these modifications.

Note that the copper-clad board does not qualify at all for a ground plane, and will have no value when the connections to it are inch-long wires. The capacitor length and lead length will also have inductance that make it pretty useless. Be sure to read the sticky topic "Techniques for reliable high-speed digital circuits." Because of the small size of your board though, I expect it will work when the connections are right, even though it is not well designed for good high-frequency behavior.

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PostPosted: Wed Aug 21, 2013 3:25 am 
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Wickeycolumbus wrote:
I'm sure the power supply circuit is horribly inadequate, I copied the simplest 7805 based circuit I could find (schematic here: http://i.stack.imgur.com/yeKoT.gif ).

I would think that a power supply using a 7805 regulator (well heat-sinked) should be adequate for this unit. The 7805 is rated at 1 A continuous. Of course, the upstream rectifier/filter has to be able to produce that much current with some headroom to assure good regulation.

Quote:
This whole project was rushed and limited by the free version of Eagle's restrictions, and of course my lack of knowledge of PCB design and Eagle cad. Once I got the autorouter to spit out a 100% completed layout, I went with it! I could post the schematic and board layout, but they are very very ugly. Rather than designing a new chip icon for each new library, I just copied a library with the same package type and re-purposed all the pins, so the ICs look a bit off. Also there are no wire connections between anything, only points I named and connected. There are no component values on the schematic either.

If you were an employee of mine I'd call you into my office and castigate you for being so hasty. However, since this is a hobby, not a job, let this be an excellent learning experience for you and for anyone else setting out to build their own SBC. Haste does indeed make waste.

Incidentally, it's been my experience that autorouters aren't all that good in "wiring up" a board. Once you get a few of these under your belt, it becomes relatively easy to do a good manual layout and avoid "it won't work" gotchas. There's an awful lot of information scattered around here on all this stuff, and giving it a good read can help you avoid a DOA design.

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Attached is a picture of the bottom of the board, which probably looks hilarious to some of you guys :oops: It is a prototype after all :lol:

You must not have read the above posts about clock generation. Bad monkey! No banana! :lol:

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PostPosted: Wed Aug 21, 2013 4:43 am 
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Quote:
Quote:
This whole project was rushed and limited by the free version of Eagle's restrictions, and of course my lack of knowledge of PCB design and Eagle cad. Once I got the autorouter to spit out a 100% completed layout, I went with it! I could post the schematic and board layout, but they are very very ugly. Rather than designing a new chip icon for each new library, I just copied a library with the same package type and re-purposed all the pins, so the ICs look a bit off. Also there are no wire connections between anything, only points I named and connected. There are no component values on the schematic either.

If you were an employee of mine I'd call you into my office and castigate you for being so hasty. However, since this is a hobby, not a job, let this be an excellent learning experience for you and for anyone else setting out to build their own SBC. Haste does indeed make waste.

Incidentally, it's been my experience that autorouters aren't all that good in "wiring up" a board. Once you get a few of these under your belt, it becomes relatively easy to do a good manual layout and avoid "it won't work" gotchas. There's an awful lot of information scattered around here on all this stuff, and giving it a good read can help you avoid a DOA design.


I agree, it was dumb to not do it right the first time, I plead ignorance :) I'm a still a student and wanted to get this made before going back to school in the fall. I worked on it in the little free time I had while not at working at my real job.

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Quote:
Attached is a picture of the bottom of the board, which probably looks hilarious to some of you guys :oops: It is a prototype after all :lol:

You must not have read the above posts about clock generation. Bad monkey! No banana! :lol:[/size]


So the crystal set up I have may be insufficent? It works in the other (soldered with wires) unit I have, though I suppose the combination of the iffy clock and poor layout would cause it to not work in this case? For what it's worth, when I probe pin 37 there is a squarish wave at the correct frequency/amplitude. I'll have to see if I can get a can oscillator locally. I suppose one like this would do the trick?

http://www.jameco.com/webapp/wcs/stores ... _325500_-1

For this type of clock, is a flip-flop absolutely necessary? How do you know if the output is symmetrical?


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PostPosted: Wed Aug 21, 2013 5:11 am 
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Wickeycolumbus wrote:
So the crystal set up I have may be insufficent? It works in the other (soldered with wires) unit I have, though I suppose the combination of the iffy clock and poor layout would cause it to not work in this case? For what it's worth, when I probe pin 37 there is a squarish wave at the correct frequency/amplitude. I'll have to see if I can get a can oscillator locally. I suppose one like this would do the trick?

http://www.jameco.com/webapp/wcs/stores ... _325500_-1

For this type of clock, is a flip-flop absolutely necessary? How do you know if the output is symmetrical?

How's the rise time look at pin 37? And is the ringing bad enough to change states? (Make sure you're using the probe in the x10 position for anything like this.) What frequency are the 'scope and probes rated to?

The oscillator can you link to should be fine. If you're not nearly pushing the speed limits of the parts, a little asymmetry won't hurt anything because the high time and low time will still be plenty well above the minimum requirements.

I didn't catch the part about the autorouter before. I don't really recommend autorouters, but that by itself is probably not what's keeping the board from working. You can usually get better performance and density if you hand-route the traces while placing the parts. Optimization can be done better by humans too. There are too many possible valid tricks that the machine won't know about, like the first tip in my "Tip of the Day" column. (My work usually goes for the highest density practical, and we have critical things that won't necessarily work right just because they are schematically correct. Much attention must be paid to keeping digital and switching power supply noise out of analog lines, and to RF immunity, etc..)

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PostPosted: Wed Aug 21, 2013 5:43 pm 
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Wickeycolumbus wrote:
I agree, it was dumb to not do it right the first time, I plead ignorance :) I'm a still a student and wanted to get this made before going back to school in the fall. I worked on it in the little free time I had while not at working at my real job.

It's okay to mess up now and then...experiencing failure continues to be the best learning tool ever devised. My first SBC (POC V1.0), though carefully engineered over a period of several months and with plenty of good advice from other forum members, was initially DOA. The cause was a missing trace on the PCB, which I corrected with blue wire—the mistake was in the actual board layout, not production, putting the blame squarely on yours truly. :oops: There was one other "gotcha" in it as well, a somewhat obscure timing issue, which I have documented at some length on my POC website, as well as in posts in the POC topic.

The point is, don't be afraid of making an error, but do avail yourself of as much information as possible so as to minimize the likelihood of ending up with a DOA unit. Also, it's essential to read and understand data sheets, and to study timing diagrams. If you don't understand something, there's bound to be someone here who can explain it.

Quote:
So the crystal set up I have may be insufficent? It works in the other (soldered with wires) unit I have, though I suppose the combination of the iffy clock and poor layout would cause it to not work in this case?

Garth responded to this (also see his website for more info about clock generation) but I'll also toss in my two cents.

Getting a crystal oscillator circuit to work well and maintain stability over a fairly wide temperature range can be tricky. Aside from choice of auxiliary components, the physical arrangement of the circuit can make or break it. The industry responded to this problem decades ago with the development of the packaged (can) oscillator, which is available in a very wide range of frequencies, including the ones commonly used as baud rate clocks (1.8432 MHz, 3.6864 MHz, etc.). I started using can oscillators as clock sources for various applications in the latter 1980s, and have not used a discrete crystal circuit since then, completely eliminating DOA problems related to non-functioning clock generators.

If you use a can oscillator for Ø2 clock generation you will be assured of good stability (100 PPM over the commercial temperature range is typical and more than adequate for most applications), a sharply-defined rectangular output and plenty of drive. If you socket the oscillator, as I did on my POC units, you can readily change the Ø2 frequency by merely plugging in a different oscillator. You won't get extra brownie points for doing it the hard way with a crystal, caps, extra silicon, etc. As your time is valuable to you, it seems prudent to expend it in a way that is of most value, which isn't reinventing the clock generation wheel. :)

Quote:
For what it's worth, when I probe pin 37 there is a squarish wave at the correct frequency/amplitude.

Squarish meaning...? Can you post a picture for us?

Quote:
I suppose one like this would do the trick?

http://www.jameco.com/webapp/wcs/stores ... _325500_-1

It will, assuming it's the desired frequency.

Quote:
For this type of clock, is a flip-flop absolutely necessary? How do you know if the output is symmetrical?

At lower frequencies (say, under 4 MHz), small amounts of Ø2 clock signal asymmetry are usually tolerated, so a flop is optional. I recommend the flop at higher frequencies to assure a 50 percent duty cycle, since asymmetry at elevated Ø2 rates can inadvertently violate MPU timing requirements.

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PostPosted: Thu Aug 22, 2013 7:01 pm 
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Note that you can clock the 65C02 at pretty much any frequency starting at 0 Hz, so if you want to check if it's running (and if so, what it's running), you can take the crystal or clock generator off, and replace it with a flipflop that you set and reset with an SPDT type switch.

Pull reset down, generate 2 clock pulses by hand, pull reset up again, and generate another 6 clock pulses. Then check that the address bus is $FFFC, followed by $FFFD on the next clock. Check what it gets back from the ROM as reset vector, etc...

If you have a bunch of LEDs (and resistors) that you can connect to the address bus and/or data bus, you can easily trace through the entire reset sequence ("Altair style") and find out what parts are working and what isn't. You have an EPROM burner so you can easily write some simple assembler routines that can verify parts of the system.

===Jac


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PostPosted: Thu Aug 22, 2013 7:20 pm 
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jac_goudsmit wrote:
Pull reset down, generate 2 clock pulses by hand, pull reset up again, and generate another 6 clock pulses. Then check that the address bus is $FFFC, followed by $FFFD on the next clock. Check what it gets back from the ROM as reset vector, etc...

Good idea!

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