> You can't drive that many chips without buffering.
This may have been true of the old NMOS processors especially when some loads would be 74LS instead of CMOS, but the CMOS processors running at only 2MHz can drive a
ton of CMOS loads.
I took some numbers on 65c22 VIAs which I believe have the same drivers as their manufacturers' processors.
I found the WDC VIA to be able to pull down to a valid TTL logic-low level with about 24mA, and up to a valid TTL logic-high level with about 40mA. Even if you had all LS loads, that's still at least 15; but your memory and VIA inputs and any CMOS logic inputs will require virtually no current except to charge the input capacitances-- an trivial job at 2MHz.
I found from experimentation that the Rockwell VIAs can pull down to a valid TTL logic-low level with about 40mA, and up to a valid high with over 10mA. Just trying to pull down with the pin shorted to +5V, I got over 100mA. (Not wanting to damage the part, I did this shorting test at only one pin at a time and for just long enough to get a reading.)
My workbench computer which you can see at
http://www.6502.org/users/garth/projects.php?project=1 has 8 things on the data bus, and the voltages still go virtually all the way to 0V and 5V, with waveforms as square as my 20MHz oscilloscope is able to display.
The STD-bus automated test equipment setup I did at my last place of work, which you can see at
http://www.6502.org/users/garth/projects.php?project=6 , had 12 things hanging on the bus, including 7 memory ICs, 4 I/O ICs, and the 74LS buffers that went only to the STD bus backplane, not to the memory and I/O ICs.
Note: At the time of this writing, there's something wrong with the website and the ATE URL takes you to the workbench computer page again. Hopefully it will be working when you get this message.