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BDD:

Just my two cents.

I would like to write it as JMP OPERAND if operand referred to a label to a variable or subroutine. In this case, I would expect that the assembler inserts into the output is the address of the variable or subroutine. On the other hand, if operand refers to a constant, I would like to write it as JMP #OPERAND.

I agree that instruction is the same in either case. However, I believe that the programmer should be able to convey the intent, pushing an address or pushing a constant, by being able to use either the syntax for absolute direct addresses or immediate operands.

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Michael A.

I always thought that was strange too. I suppose that if the A, I, and R in PEA, PEI, and PER stand for "absolute," "indirect," and "relative," they used "absolute" instead of "immediate" so the I wouldn't conflict with "indirect."


except that PEA does not affect A or P.

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Hi BDD,

I agree PEA acts on the operand as an immediate value. However, it is always a 16 bit value and using the # symbol might lead to confusion depending upon the M flag being in 16-bit mode or 8-bit mode. Since PEA only has one type of addressing mode, I would just leave it as "PEA operand". Just my opinion.

Daryl

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I noticed this as well - probably along with every other writer of 65816 assemblers. The official syntax of PEA and PEI does seem inconsistent with what they actually do, given the syntax of the original 6502 instructions. I resolved it by providing both the official syntax and alternate address modes which are consistent with what they do. Quite simple because it amounts to just a couple of extra table entries that generate the same opcodes.

So in HXA it's possible to write



The usual caveat that the unofficial address modes are not portable, of course.

In a way this is somewhat like the "to 'A' or not" question with regard to accumulator address mode.

Alhough on 65816 there does not seem to be such instruction, on some other CPUs is LEA instruction (Leave Effective Address), which calculates the address and stores it in some register. PEA is then alternative, that pushes it the same address directly on the stack.

The logic seems same on 65816, even if it does not have the LEA instruction.

I would probably leave the PEA as it is and add some version of push instruction instead (PHW - PusH Word).

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The 6809 uses LEA for "Load Effective Address," and then adds a letter to tell where. Anyway, PHA, PHX, and PHY push words if you have them in 16-bit mode; so PHW could be rather ambiguous.

The programming manual says,

[emphasis added] meaning the "A" stands for "absolute," not "address," and, as the manual further says, it could be anything. If 65-family mnemonics had four letters, all three of these would add an "A" at the end for "address."


I would say that pushing the content of an address stored at $12-$13 would make it a double indirect. I think the PEI as an indirect makes perfect sense because it is indeed that-- an indirect. It does not push a $12, but rather gets its data to push by reading the contents of address $12 & 13.

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What's an additional VIA among friends, anyhow?

Isn't that rather like claiming "LDA $12" is also an indirect address mode, since it get its data by reading the contents of $12?

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This is how my 65m32 handles operands that are to be used at "face-value", regardless of the value's intended future use. I originally wanted to call the equivalent to the 6502's immediate mode "direct" for the 65m32, and the equivalent to the 6502's absolute mode "indirect" for the 65m32, because to me they state the nature of the operand more accurately. A direct operand value is to be used "directly", and an "indirect" operand value is to be used as a pointer to the direct value. I decided to keep the 6502 nomenclature, to avoid the inevitable confusion that would be caused, because the "direct" and "indirect" terms are already defined as something with an additional level of indirection in the 6502 world.

Treating the instruction pointer as "just another" register that happens to be used by the instruction fetch mechanism allows the native 65m32 instruction ldn #$4321 to be the equivalent of the 6502's jmp $4321, and ldn $5432,x to be the equivalent of the 65c02's jmp ($5432,x). Out of respect for the 6502's influence on my design, I would like to allow both forms of these instructions in my assembler ... if I ever find the time to write it!

Mike

Here is how WDC explains it.
Taken from the programming manual:

PEA
Although the mnemonic suggests that the sixteen-bit value pushed on the stack be considered an
address, the instruction may also be considered a “push sixteen-bit immediate data” instruction, although the
syntax of immediate addressing is not used. The assembler syntax is that of the absolute addressing mode, that
is, a label or sixteen-bit value in the operand field. Unlike all other instructions that use this assembler syntax,
the effective address itself, rather than the data stored at the effective address, is what is accessed (and in this
case, pushed onto the stack).

PEI
The assembler syntax is that of direct page indirect; however, unlike other instructions which
use this assembler syntax, the effective indirect address, rather than the data stored at that address, is
what is accessed and pushed onto the stack.

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I think so, but there's the matter of going against what's already established being something that will cause confusion and require more changes to go from one assembler to another. <sigh>


and I could see that earlier in the manual and it sort of makes sense (because "absolute" is always 16 bits regardless of selected register size); but it's still something you just have to remember.


I would probably put both in the Forth assembler in my Forth kernel, but I won't be able to write that until there's a regular assembler. Although it won't be free, what you could do to save a lot of time and end up with a nice macro assembler is to get Cross-32 from Data Sync Engineering for $99. It comes with the tables for 50 different processors and the info you need to make up your own for a new processor.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?