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PostPosted: Sun May 26, 2013 6:07 pm 
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Hi all,

The idea of making a (6502-based) computer on my own dates back as far as 1986 or so, although it never materialized. Lately it came back and developed into a very ambitious project... but the sensible way was to begin with something much simpler and (hopefully) develop fron that.

So, in late 2012 I decided to build a pretty simple 6502 device on a breadboard -- with the excuse of teching my students about the underpinnings of a computer! Dubbed SDd (Sistema de Desarrollo didáctico, which is Spanish for "Didactic Development System"), it only used 13 out of 16 address lines (for less cluttered cabling!) and extremely minimalistic decoding, resulting on 2 KB RAM, up to 4 KB EPROM and a 6522 VIA in between (mirrored lots of times!).

Other than that, nothing fancy: originally it had a row of LEDs connected to the VIA's ports (later it had a buzzer on PB7) and a 2 MHz oscillator can connected thru a 4040 divider, in order to select the speed from very slow to overclocking attempts. Here's a picture of it... being diagnosed :?
Image
It went thru several revisions (read: repairs) and even RAMless for a while... but even in such a limited configuration, it could do things like flashing LEDs sequentially or even play the riff from Smoke on The Water! Obviously, I've been learning a lot thru all these "revisions"...

After cleaning up the wiring (once again) I was able to mount the SRAM chip again, and do more useful tasks, like testing SRAM chips of types unsupported by my tester -- all thru the VIA ports, not connected to the regular busses!
Image
or even running a pretty accurate digital clock, here with the help of a bus sniffer I made, which shows in Hex the bits at the VIA ports (or wherever I connect its 16 data lines) -- just a matter of putting the time in BCD at the ports:
Image

But the final intent of this device wasn't executing ad hoc firmware, but being the first machine to run minimOS, my Operating System in the making -- more about that in a separate thread :D Anyway, I was in need of a more human interface device, so I made (again on didactic purposes) a LED Keypad for some I/O capability. Once again, one of those HD44780-based LCD modules would have been much easier... and cheaper, but this way my students could see multiplexing and debouncing in action :wink: In fact, debugging its driver has been the most time-consuming task of my system's development, so far :| But it works, and here's a pic (deliberately dark to emphasize the displays) of my whole system (computer + LED keypad) saying hello to the world:
Image
you can type numbers on the keypad and actually see them appear (and scroll!) on the displays... :D

Now that the snowball is rolling, I won't stop here... :twisted: some other machines exist on the roadmap, some of them already under construction:
  • Chihuahua: a soldered, compact (7x9 cm, less than 3x4") version of SDd, 100% software compatible. 1 MHz soldered can. The PB7 buzzer is now standard, and can be disabled via CB2. Includes a port for the VIA, and some separate connections for the SS-22 port introduced in this forum, which I intend to support and develop -- alas, without the proposed connector because lack of space. It is built in full and sort-of-works, but with some strange issues :(
  • Chihuahua PLUS: improved design, same size but now has 16 KB of SRAM and up to 32 KB of EPROM, backwards compatible with SDd/Chihuahua. Socketed can. Partly built, hope the previous issues get solved here...
  • SDx: the eXpansible Development System, a larger stripboard (hope it works well!) of the same capacity of Chihuahua Plus but with much more I/O: all of the former plus serial (65C51), Real-Time Clock (with its backup battery) and LCD module. Socketed oscillator, ZIF-socketed EPROM, supports 6502, 65C02 (WDC or not) and the 65C102. Has a unique expansion connector. Partially constructed, but has gone thru a few redesigns yet...
  • Baja: Still in my mind... 16 K ROM and RAM, 16550 UART, would support 65C816 via jumpers. New expansion socket, VME-based but 6502-friendly. Support for optional MMU, providing bankswitching (two 16 K windows, up to 1 GB addressing) and/or hardware assisted multitasking (bankswitched zeropage + stack)
  • Baja Plus: Still in my mind... this is more or less the original idea I had. Similar to the "standard" one but most likely using GALs, with integrated MMU of same specs as the optional module for the Baja. Possible option of cache memory. May integrate the exception-like protection module already discussed :mrgreen:
  • Veracruz: Top of the range, I think... all SMD and GALs, 65C816 with integrated MMU, cache and God-knows-what-else :wink:
...plus some other simpler machines for specific tasks, but supporting my OS for easier development.

On the peripheral side, there are some things to do... Besides the already mentioned LED-keypad and bus sniffer:
  • A real ASCII keyboard... with integrated 20x4 LCD module. I know, it's pretty easy interfacing to a PS/2 keyboard, and much cheaper... but I wanted to do my own 8)
    Image
  • A proof-of-concept simple VDU (video card) connected thru the VIA! Awfully slow, I'm afraid, but compatible with the expansion-crippled Chihuahuas... 6845 based, text only (64x30 chars) supporting both a standard VGA monitor and a TV mode
  • The expansion port of SDx is intended for alternative processors (6800, 6303, 68020...) -- yup, my OS aims to be multi-platform.
  • The VME-like connector of the Baja and higher models will allow all kind of devices: graphic cards (even bit/pixmaps), sound cards, ROM/RAM expansion...

As you can see, there's still a long way to go, but even if I started with a much simpler device, I think it's best not to put brake to imagination! Time will tell how far can I go...

My apologies for the long post... Cheers to all,

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Last edited by zuiko21 on Wed May 29, 2013 6:49 am, edited 1 time in total.

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PostPosted: Sun May 26, 2013 6:24 pm 
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Nice job. Be careful with those scope probes though. I recommend putting a small wire in the breadboard, and clipping the probes on them, so you don't accidentally bump into the probes and bend the tips.


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PostPosted: Sun May 26, 2013 8:15 pm 
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Bravo! And the Chihuahua board is nice and tight. Well done.

Quote:
and some separate connections for the SS-22 port introduced in this forum, which I intend to support and develop

Three cheers!

Quote:
Real-Time Clock (with its backup battery)

What kind? I got a couple of Philips PCF8593P I²C RTCs in 8-pin DIP with the intention of putting one on a tiny I2C-6 module with something like a watch battery for backup, and use the IRQ\ line for alarms. At the moment I'm only using the software RTC running off a 10ms NMI from a VIA's free-running T1. This gives finer resolution for things like key debouncing and timing processes that you don't want to wait a whole second for. For the project I recently mentioned doing in the 1980's where the entire computer only took a couple of mA, I used a Saronix RTC58321 4-bit parallel RTC in a 16-pin DIP with an integrated crystal.

If you get even more ambitious, you could add a 65SIB port for an SPI-compatible serial bus that's expanded in several directions at once. For a long time I've wanted to make a digitally controlled phase-accumulator-type signal generator, and now my job requires one, so just last night I got one going. Woohoo! I think I'll make myself one that goes on the 65SIB.

And if you're interested in fast math, you could implement the large look-up tables for hyperfast, accurate 16-bit scaled-integer math.

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PostPosted: Mon May 27, 2013 1:11 pm 
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Very nice!


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PostPosted: Mon May 27, 2013 4:40 pm 
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GARTHWILSON wrote:
Bravo! And the Chihuahua board is nice and tight. Well done.

It's much smaller than its namesake. :lol:

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PostPosted: Wed May 29, 2013 7:12 am 
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Arlet wrote:
Nice job. Be careful with those scope probes though. I recommend putting a small wire in the breadboard, and clipping the probes on them, so you don't accidentally bump into the probes and bend the tips.
That's what I usually do for the ground connection... then I keep another probe in my hand, probing the desired points -- but I had to leave it alone for the picture. I am most concerned about the shorts the probe could make if it falls from the hole...

GARTHWILSON wrote:
Quote:
and some separate connections for the SS-22 port introduced in this forum, which I intend to support and develop

Three cheers!
:) When I studied about the capabilities of the VIA, I knew something could be done with that shift register to make it a simple communication port between machines of my breed, but having read about the bug did put me off... Now, it's time to keep the ball rolling :wink: I think I'll continue your thread on the SS-22 port with details of my specific implementation, if you don't mind :roll:

Quote:
Quote:
Real-Time Clock (with its backup battery)
What kind? I got a couple of Philips PCF8593P I²C RTCs
I'm currently using a rather obsolete MC146818... because I have a few of them and want to use them up! This is, in fact, the reason I designed the RDY generating circuit for SDx even if it's intended to run at a mere 2 MHz :( Anyway, my OS isn't tied to any particular hardware; I can use any other RTC by simple writing the appropriate driver.

Still don't have any I²C design (hardware or software) but I was very interested on it... I'll have a look at it.

Quote:
If you get even more ambitious, you could add a 65SIB port for an SPI-compatible serial bus that's expanded in several directions at once
That 65SIB looks very interesting... ditto for your 16bitMathTables. Coming soon :)

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PostPosted: Wed May 29, 2013 7:43 am 
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zuiko21 wrote:
GARTHWILSON wrote:
Quote:
and some separate connections for the SS-22 port introduced in this forum, which I intend to support and develop

Three cheers!
:) When I studied about the capabilities of the VIA, I knew something could be done with that shift register to make it a simple communication port between machines of my breed, but having read about the bug did put me off... Now, it's time to keep the ball rolling :wink: I think I'll continue your thread on the SS-22 port with details of my specific implementation, if you don't mind :roll:

Please do!

Quote:
Still don't have any I²C design (hardware or software) but I was very interested on it... I'll have a look at it.

I have a circuit for that at http://wilsonminesco.com/6502primer/pot ... ITBANG_I2C, with a link to accompanying driver code (http://wilsonminesco.com/6502primer/GENRLI2C.ASM).

How is it that you do so well in English? I was born in the States but grew up elsewhere and learned to read and write first in Spanish. Then in 1989-90 I did a little radio work in southern Spain, in Rincón de la Victoria, a little east of Málaga.

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What's an additional VIA among friends, anyhow?


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PostPosted: Wed May 29, 2013 8:49 am 
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zuiko21 wrote:
When I studied about the capabilities of the VIA, I knew something could be done with that shift register
zuiko21 wrote:
That 65SIB looks very interesting

Sounds like you have your hands full --and, great work, btw! But maybe you'll be interested in jesari's arrangement that uses a VIA as the heart of an SPI interface (making it a natural for 65SIB). The VIA acts as the parallel-to-serial shift register and also generates bursts of 8 clock pulses as required. A 74_164 is used as the serial-to-parallel shift register. The speeds are much higher than what a simple bit-banged SPI can achieve. (Of course for many applications bit-banging may be adequate. That's one of the nice things about SPI -- having different tradeoffs available.)

cheers,
Jeff

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PostPosted: Sat Jun 15, 2013 9:01 am 
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Great job, well done!

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PostPosted: Tue Oct 22, 2013 10:16 am 
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Hi all! Sorry for being absent all this time!

GARTHWILSON wrote:
Bravo! And the Chihuahua board is nice and tight. Well done.
Unfortunately, is not working 100% :cry: I know that a million things can go wrong, but what puzzles me is that it almost work... The tried and tested code (playing Smoke on the water thru the PB7 output from T1 free-run counter, with CB2 used for diabling the speaker in order to "play" the appropriate rests) seems to execute OK without crashing -- notes are played at the expected durations, with the sound enabled and disabled at the required moments, but the tones played are just wrong! Seems that the VIA isn't getting the right values for the counters... :?:

Checked all data bus lines' conductivity, and they're OK. Putting the scope's probe on each data line (between the CPU and the VIA) doesn't show anything odd, with acceptable waveforms. Actually, the very same VIA and the very same EPROM on the breadboard does play just fine, and with even worse waveforms on the scope!

And I've found some other issues, too... Don't know what could be happening here... I'm aware of transmission lines and their issue, but if I'm having trouble at just 1 MHz with lines less than one inch long, it's a bit discouraging... :? On the other hand, I'm about to finish ChihuahuaPLUS, essentialy an improved version -- same external dimensions and pretty much the same basic design, this time using all of the 65C02's address bits plus a redesign of some embarrasing (but otherwise operative) details of the older version :oops: Let's hope things get sorted out with this one...

Quote:
Quote:
and some separate connections for the SS-22 port introduced in this forum, which I intend to support and develop

Three cheers!
Particularly interested in this. Version 0.4.1 of my OS hasn't been even assembled with the new naming convention, but I'd love to include the SS-22 driver ASAP. I'll write soon on your post in order to clarify some final details.

GARTHWILSON wrote:
How is it that you do so well in English? I was born in the States but grew up elsewhere and learned to read and write first in Spanish. Then in 1989-90 I did a little radio work in southern Spain, in Rincón de la Victoria, a little east of Málaga.
Oh well, maybe because I was born in a family of English Language teachers :) Learned the language when I was young, it was a pretty natural process... nowadays, learning another language is much tougher to me!

Dr Jefyll wrote:
zuiko21 wrote:
That 65SIB looks very interesting

Sounds like you have your hands full --and, great work, btw! But maybe you'll be interested in jesari's arrangement that uses a VIA as the heart of an SPI interface (making it a natural for 65SIB).

Very interesting! And we could call that The Spanish Connection :lol: Seriously, I'll have a look at it.

Thanks again for all your comments!

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PostPosted: Tue Oct 22, 2013 5:16 pm 
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Still bravo, so let's get the remaining bugs fixed :-)

I don't know if you've got your schematics here, but the VIA has an "undocumented" feature. It needs the address lines and select stable at rising phi2.
That was an issue in the C64 (when using a VIA on the expansion port) where during phi1 the VIC used the bus, so the CPU was only able to put the addresses there
when it was too late for the VIA.

Another one: how do you compute the VIA timer values? How do you create the sound? If you use the shift register, a value %10101010 shifted out has a much (4x) higher frequency than %11110000,
at the same shift rate (i.e. timer value).

1MHz shouldn't be much of a problem. Though, ... are you using CMOS logic? (Like 74HCTxxx) or other fast logic like 74ALSxxx. Those have much steeper flanks on their signals, i.e.
rise and fall times are much shorter, and the frequency spectrum of this "binary" signal goes much higher - with much more potential for interference. Maybe try with 74LSxxx

Hope that helps
André

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PostPosted: Tue Oct 22, 2013 5:18 pm 
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zuiko21 wrote:
Dr Jefyll wrote:
zuiko21 wrote:
That 65SIB looks very interesting

Sounds like you have your hands full --and, great work, btw! But maybe you'll be interested in jesari's arrangement that uses a VIA as the heart of an SPI interface (making it a natural for 65SIB).

Very interesting! And we could call that The Spanish Connection :lol: Seriously, I'll have a look at it.

Thanks again for all your comments!


I have to add that the VIA actually does SPI mode 3 "naturally". You only need to shift out the byte via the shift register, and shift it into a 74164 Serial-in-parallel-out. I'm using this here on the PET userport to connect an SPI type 0/3 USB chip: http://www.6502.org/users/andre/cbmhw/cbmusb/index.html

André

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PostPosted: Tue Oct 22, 2013 5:23 pm 
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Are the notes consistently too high, or too low? Or really very wrong? I wonder if stray interrupts could slow things down.


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PostPosted: Tue Oct 22, 2013 6:22 pm 
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fachat wrote:
Still bravo, so let's get the remaining bugs fixed :-)

I don't know if you've got your schematics here, but the VIA has an "undocumented" feature. It needs the address lines and select stable at rising phi2. That was an issue in the C64 (when using a VIA on the expansion port) where during phi1 the VIC used the bus, so the CPU was only able to put the addresses there when it was too late for the VIA.

It's documented in the data sheet. It is the reason for my workaround for my C64 interface board with two VIAs.

Quote:
Another one: how do you compute the VIA timer values? How do you create the sound? If you use the shift register, a value %10101010 shifted out has a much (4x) higher frequency than %11110000, at the same shift rate (i.e. timer value).

You use T1 in free-run mode and have it toggle PB7 every time it times out. This is entirely separate from the shift clock of the SR.

Quote:
1MHz shouldn't be much of a problem. Though, ... are you using CMOS logic? (Like 74HCTxxx) or other fast logic like 74ALSxxx. Those have much steeper flanks on their signals, i.e. rise and fall times are much shorter, and the frequency spectrum of this "binary" signal goes much higher - with much more potential for interference. Maybe try with 74LSxxx

For such a small board and 1MHz, I doubt that the AC behavior is a problem.

Quote:
Are the notes consistently too high, or too low? Or really very wrong? I wonder if stray interrupts could slow things down.

A nice thing about using T1 in free-run mode to toggle PB7 is that the VIA can continue putting out a smooth signal without needing any attention from the processor; so the worst thing interrupts would do there is keep it from changing notes on time (which would probably have a indiscernable effect since a super long ISR will still have insignificant length compared to musical notes.)

I have done what you're talking about zuiko21, so if you post your code to set up the VIA and set the notes, I wonder if I could find the problem.

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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PostPosted: Tue Oct 22, 2013 7:24 pm 
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fachat wrote:
I have to add that the VIA actually does SPI mode 3 "naturally". You only need to shift out the byte via the shift register, and shift it into a 74164 Serial-in-parallel-out. I'm using this here on the PET userport to connect an SPI type 0/3 USB chip: http://www.6502.org/users/andre/cbmhw/cbmusb/index.html

The 74164 isn't available, but its 74AC and 74HC counterparts are. Although the speed of the 74AC164 is of no particular value in this application, its strong drive characteristics may be.

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