Just found this page in the NESdev wiki: Assembly Optimisations

Contents:

1 Optimise both speed and size of the code
1.1 Avoid a jsr + rts chain
1.2 Split word tables in high and low components
1.3 Use Jump tables with RTS instruction instead of JMP indirect instruction
1.4 Use a macro instead of a subroutine which is only called once
1.5 Arithmetic shift right
1.6 Easily test 2 upper bits of a variable
1.7 Negating a value without temporaries
1.8 Avoiding the need for CLC/SEC with ADC/SBC
1.9 Test bits in decreasing order
1.10 Test bits in increasing order
1.11 Test bits without destroying the accumulator
1.12 Use opposite rotate instead of a great number of shifts
2 Optimise speed at the expense of size
2.1 Use identity look-up table instead of temp variable
2.2 Use look-up table to shift left 4 times
3 Optimise code size at the expense of cycles
3.1 Use the stack instead of a temp variable
3.2 Use an "intelligent" argument system

(Via exploration of pages like this)

Thanks-- and that page has a link to a synthetic-instructions page which is also good.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

They don't seem to be giving Woz any credit for inventing the "RTS trick". Correct me if I'm wrong, but I believe that it was used publicly for the first time (at least on the 6502) in his SWEET-16 interpreter, circa 1977.

I love that guy! I have spent many hours studying (and trying to emulate) his spaghetti code style ... not very maintainable unless the source is well-commented, but delicious works of art nonetheless.

Mike

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Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)