Greetings from frigid Michigan.

May I ask if anyone is familiar with the W65C134S, please? If so, can you tell me if there's anything special I need to do with the RESB line, please? From the documentation, it almost seems that this 'microcontroller' doesn't need a special reset controller. From your experience, is this correct?

The documentation suggests that I all I need to bring this thing "up" with the built-in Monitor program and the 192 bytes of internal RAM mirrored between $0040..00FF and $0140..01FF is, (A) a 32768 Hz crystal and caps, (B) a 2.4576 or 4.0 MHz crystal and caps, (C) appropriate bypass caps, (D) a USB-to-TTL_Serial adapter for serial connection and power, and (4) a terminal program of some sort on my Win-7 laptop. Is this correct? Has anyone built an SBC or trainer with one of these WDC chips that I can reference?

TIA for your help guys... Cheerful regards, Mike

This is my take on the 65C134S datasheet with respect to the RESB (nRst) input.

From the datasheet, I find no mention of an internal voltage detector or other power on circuit. The only requirement appears to be that an active reset pulse be generated that is at least two Phi2O clock periods in width. Further, it does not appear that you have to synchronize the reset pulse to the Phi2O clock. I say this because the datasheet implies that the clocks are stopped after the reset pulse is recognized by internal circuitry and will remain stopped while reset remains asserted. Once reset is de-asserted, then the clocks will restart and the processor's reset sequence will be performed.

From this I conclude that you'll need a simple external reset controller. By simple, I mean a device that monitors only a single voltage and only generates a simple pulsed reset output. In other words, does not a provide watch-dog timer function or programmable delays and controls for sequencing of power supplies.

The Microchip MCP120/MCP130 devices are my preferred devices for this type of simple reset controller. They are available in a wide variety of voltages. Both allow a push-button to be attached from its reset output to ground. The MCP130 has an internal pull-up resistor, and the MCP120 requires an external resistor. I generally use the MCP120, and I put a 4.7k Ohm resistor from the output to the I/O voltage of the device to which I am connecting the MCP120. This configuration allows me to set the I/O voltage levels while monitoring voltages which might damage the device being driven by the reset output.

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Michael A.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Thank you, Gentlemen. That should be enough to get started...

Cheerful regards, Mike

Michael, may I ask what MCP120 device "trip voltage" you use? Is 2.7v ok?

TIA... Mike

I would use a threshold value 10-15% less than the operating voltage. The 2.7V value is too low for reliable operation of the circuit and of the voltage monitor. You want the monitor to protect your circuit from supply voltage spikes that are so large that they can cause incorrect operation. However, you don't want the voltage monitor to be sensitive to normal power supply noise.

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Michael A.

I think you said how old the 134's were in another topic, but I don't remember. My '91 data sheet guarantees they'll work down to 2.8V, but at a reduced speed of course.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

I received the samples around 03/27/97 and the Datasheet that came with them is dated July 1996. This datasheet also shows 2.8v minimum.

So "trip voltage" for the MCP120/130 is similar to "brown out detect voltage" on the PIC? Ok, that makes sense.

Thanks, Gentlemen...