The following link takes you to part of the decode rom:

http://visual6502.org/JSSim/expert.html?nosim=t&panx=273.3&pany=104.2&zoom=6.2

If I understood the logic correctly each vertical line(metal connection) is connected to one enhancement mode transistor at the top, therefore it is always powered. On its way to the bottom the line connects to several diffusion elements(the small yellow squares). Anyone of those diffusion elements can be grounded by activation of the corresponding transistor through one of the horizontal lines. If this happens the vertical line will be grounded and the power will not proceed from there on. If none of the transistors is activated the vertical line will be powered all the way through and will affect some other circuit down in the chip.

If the above is correct then there must be a small mistake in the simulation. If you run it you will notice that the vertical lines are either totally powered all the way through or not powered at all. This is wrong. According to my understanding above the lines should always be powered until meeting the first grounded element.

Am I correct or is it me that made a mistake in my reasoning somewhere?

Hi Cerebrum
indeed, you are making a mistake... all the wires on the chip are conductive, so the voltage on them will be very nearly the same throughout. The pullup at the north end of the PLA lines can be thought of as resistive: if nothing is pulling to ground then the wire will be pulled up to the rail voltage. But the pulldowns are much stronger, so if one or more of them is on it will succeed in pulling the wire rather close to ground. So long as a wire is pulled down to within half a volt of ground that will be enough to act as a logic zero to the next gate. Anywhere between half a volt and a volt and a half would be a bit dangerously ambiguous, and anything above a volt and a half is increasingly likely to act as a logic one.

Keep up the good questions!

Hope this helps
Ed

Thanks Ed, I see my mistake now. But the general logic of the decode Rom is: a vertical line will be powered when none of the diffusion elements(yellow squares) below it is grounded(by the corresponding transistor which is turned on by the horizontal polysilicon lines). Correct?

Yep! It's a NOR gate: the basic and most common gate in a process like NMOS.