Hi AtariKSI, and welcome!
STZ direct is opcode $64. At http://visual6502.org/wiki/index.php?ti ... 56_Opcodes we learn that this is indeed a NOP on the NMOS 6502 - it is unspecified behaviour, but turns out to be a nop. It's a 3-cycle NOP and you'll see that there are some 2-cycle NOPs.

Two things bother me a bit: you perform PLA and RTS - does this mean you expect to run this code in an interrupt routine? It would not be safe to do that, because the stacked return address for RTS and RTI are different by 1. And yet, since the processor won't change while you're running, I don't see why you would want to run in an interrupt routine. As with Jeff, I think there's something about your environment which isn't familiar to us.

If you only check for 6502 or 65C02 at initialisation time, you don't, presumably, care about saving a few bytes or cycles in the check. I see the point about being unable to SED if there's a chance of NMIs and if the NMI routine will fail if decimal mode is set. And yet: how badly will it fail? Does it really use ADC or SBC in an NMI routine? If you only perform the check once, are you in fact safe?

At http://www.oxyron.de/html/opcodes02.html you'll find other undocumented behaviour.
...

Faster, shorter, no decimal mode problems.

Lee.