Hi and a happy new year to all.

Does anyone have a SIMPLE hardware circuit for implementing single-step with the 6502? I need to do this entirely in hardware, not a hybrid version like found on the KIM-1.

Thanks, in advance, for any help.
Regards,
Glenn Smith

I've never built one, but I can't imagine it being terribly hard. The 6502 has a pin called _SYNC, which goes low when fetching an opcode. When single-stepping, I envision it should be possible to drive the RDY line low when _SYNC goes low. That will indefinitely delay the processor until RDY goes high again.

The single-step circuit sounds to be little more complex than an AND-gate and a 7474-type flip-flop. _SYNC's falling edge (must be edge triggered!) clears the flip-flop, causing its Q output to go low. The Q output is AND'ed with the RDY signal that would otherwise go to the processor. If you just tie RDY low in your circuit, then you can dispense with the AND gate.

A button that you can press can hook up to a resetable, one-shot multivibrator (what a lovely name for what basically is a switch debouncer), which is responsible for setting the flip flop. That brings Q high again, thus letting RDY go high, allowing the chip to continue on to the next instruction.

Note that I haven't verified this, nor built this. But this circuit, or something very much like it, ought to work. This will allow the CPU to execute single instructions under your (hardware) control.

NB: The 65816 has two signals called VPA and VDA. When those two signals are both asserted at the same time, that indicates an opcode fetch (e.g., _SYNC := VPA NAND VDA) for the purposes of this circuit). Thus, it's also possible to do with the 816.

NB2: sorry for the edit, but I was smoking crack when I first wrote this post. The 6502 and 65816's RDY signals are active HIGH, not active low. Thus, most of my logic was reversed. I've corrected that above. I've also corrected the discrepencies between _VPA/_VDA and VPA/VDA.

Thanks for the reply. I had already started out on that route and have been playing with several different ideas. The major problem is to ensure that the 'next step' signal from the pushbutton is actually a pulse that is shorter than a clock1 cycle - otherwise the processor will continue crunching instructions until the f/f is clear to be clocked by SYNC again.
There is a circuit in one of the datasheets on this site - but it is horribly complex. I don't have space on my SBC that is under design to include all that.... So I'm wondering if coding a GAL (or even a PIC ?) might not be the neatest solution.
If I come up with a suitable solution, I'll post it here.
Regards to all,
Glenn

There is a very simple way to do it with a couple of gates, but I hesitated to respond because I haven't been able to find the info I thought I had. It used SYNC and RDY, but I've never done anything with those two pins so I might mislead you if I don't actually take the time to try it in hardware. (This would be more involved than something like checking the behavior of the BRK instruction on my existing hardware for another recent forum topic.)

For another method, I believe the AIM-65 manual shows a way to produce an interrupt after every instruction so you go into part of the monitor program and you can print out the registers, alter memory contents, etc.. I don't know if it would work after an SEI instruction. I gave my AIM-65 manual to someone who could put it to better use. I first copied the only pages I thought I would ever be interested in, and the single-stepping circuit wasn't there.

If you have a CMOS 65c02, you can stop the clock indefinitely with phase 2 high, so you can use a button and a few discretes with a schmitt-trigger inverter to produce single cycles and look at the buses at every cycle, not just after every instruction. This can be nice for seeing the operation of something like STA zp,X versus STA (zp,X) versus STA (zp),Y etc.. Instead of building this onto your board, you might want to just have a clock I/O contact on the board-edge connector, and a jumper or DIP switch to select whether or not to connect the onboard clock. If you connect the onboard clock, the contact at the edge becomes an output for a frequency counter or for sync'ing to something else. If you leave the onboard clock disconnected, the contact at the edge becomes a clock input for things like this single-cycling. Then put your single-cycle clock generator on a separate board and connect it through the edge connector.

The problem you might foresee already is that if the part of the program in question comes up only after a loop has run thousands of times, your finger won't last long enough to push the button that many times. To get there faster, I suppose you could use a slowish oscillator and a counter to do the equivalent of a hundred or a thousand button pushes at a time as desired. But in my experience, once you have a system running, you can put the debugging tools in the program itself, and there's hardly a need to see the cycle-by-cycle behavior unless there's a problem as soon as RST is let go. If there is such a problem right from the beginning, it doesn't generally take very many cycles to figure out what the problem is. One time I remember using this, what I found was a serious case of noise on the NMI line that was immediately causing a string of interrupts that overran the stack and never let the ISR get far enough to exit before being called yet again.

Thanks Garth. If you do manage to find the 'simple' way, I'd be interested. I don't (yet) have the CMOS version (I'm hoping that the bulk order will work), but it's a good idea for later. The SST was more intended for educational use, the SBC is mainly for doing 'introduction to microprocessors'. It would also be handy in case my elecronic design and PCB manufacturing skill weren't up to what I had imagined...
I've seen the different ways that program-based single-steps can be done, my old KIM-1 does it quite well. My original idea was to use the SBC without a monitor/kernel - hence the need to do it all in HW.
In light of what I've found, I may change tactics. I'm going to investigate the idea of using a (small) programmed device, however : just for the "fun"!

Back again...
Well, I did it! Although I can already hear the purists grumbling and proposing to burn me at the stake, I herby standup and say that I've used a PIC to control my 6502 SBC. Really.
One chip, a crystal and a few resistors and two evening of learning how PICs work. They're actually quite neat. Ok, OK, I'll stop there.
They're actually a bit frustrating 'cos you have to do an awful lot of work to keep 'em running sweetly : bank switching and all. But the fact they have so many electronic goodies 'built-in' make them excellent 'electronic slaves' and are easier and cheaper to master and program than GALs or PALs.
If anyone is interested in the circuit & code, let me know. If I'm out of line in proposing the use of other 'intelligence' next to the 6502 you can let me know also, but I might not listen

Nothing wrong with that. That's partially what they're designed to do.

I would be interested in your programmer for them though. Is it a home-made PIC programmer? If so, are schematics available? Thanks.

[quote]I would be interested in your programmer for them though. Is it a home-made PIC programmer? If so, are schematics available? Thanks.[/quote]
Er, sort-of... and yes. It's a programmer that I built from a web article (in french). I have the schematics and can even provide the original pcb mask... BUT - the schematic could be better and, especially, the pcb layout could be better. If you're [b]*really*[/b] interested I could probably do the required updates. Let me know your e-mail and I'll send some more info.[/quote]

I know that this is an old thread, but I'm new to this forum. The old Apple I manual had a schematic for a single-stepper circuit that used two LS74 flip-flops. This allowed for single instruction or single cycle stepping. As I recall, the scan of the schematic wasn't great and the FF pins don't match the current JEDIC designations.

Here's a link to the original Apple I manual:
http://emulation.net/apple1/manual/apple1manx.html

Here's a link to the schematic I was referring to:
http://emulation.net/apple1/manual/apple1man12.html

Rich

Great! Thanks for the info.
I've been playing with other systems lately, my SBC has taken a back seat for a while....
The winter months will soon be approaching, there'l be more time for fiddling.

Ahhh... There are few things more satisfying than tinkering with the 6502 in the basement when the snow is falling outside... Sorry for the pointless post.

Scott

Ahhh... There are few things more satisfying than tinkering with the 6502 in the basement when the snow is falling outside... Sorry for the pointless post.

Scott

Bad links - ads/malware now.

Fresh link for the A1 manual: http://www.bitsavers.org/pdf/apple/appl ... Manual.pdf

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