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 Post subject: [82.1] For 6502 -6522
PostPosted: Thu Dec 07, 2000 5:34 am 
I send this message again.because i really want your help (please).
My questions mainly involve 6522.First of all i can't understand
who a device which is connected to 6522 is selected.Is this happening through address decoding???Is the timer of the 6522 capable of handling jobs like activating a water pump at a specific time of a day every day???How is the priority in the interrupts from 6522 defined???

I hope someone wiil help me.
thanks

/***********************/
Please someone help me..
/**********************/


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 Post subject: [82.2] For 6502 -6522
PostPosted: Thu Dec 07, 2000 6:12 am 
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I wrote a rather lengthy response to the four questions you posted originally, but in the amount of time I took to write it, I guess my ISP cut me off and I lost it all when I tried to post.

The 6522's name, versatile interface adapter, is quite appropriate. It has two 8-bit parallel ports with each bit able to be either an input or an output, independently of the others, handshaking bits with different modes of operation, two timers, again with different modes of operation, a synchronous serial port, again with (you guessed it), several modes of operation, seven interrupt sources, plus some other attractions. The 6522 is used in other systems besides just 65k systems. For example, I've seen it in 68000 systems, and my EPROM programmer that plugs into the PC's backplane uses them.

On my workbench computer, I use just one of the VIAs for interfacing the printer port, LCD, keypad, beeper, and synchronous serial line, and I use one of the timers for the software real-time clock. In addition, the synchronous serial line can be connected to hundreds of bits of input or output through daisy-chained shift registers (which I did in some automated test equipment I made in 1991-1992).

To try to answer the questions as you originally posted them:

1: If you run one of the timers off the phase 2 system clock, it will roll over in a maximum of just a fraction of a second. For what you want to do, you can either cascade the timers, clock a timer with a slower external clock, or most practical, have it interrupt every time it times out, and then have the interrupt service routine (ISR) increment a variable in RAM, and activate the pump when the variable reaches the desired value.

2: Since you can control how you work the VIA's I/O bits, you can select the external devices however you wish. For the processor to select the VIA however, the VIA has a couple of chip-select lines that would be fed by the address-decoding logic, plus four register-select lines to select which of the 16 registers you want to access inside the VIA.

3: Yes, each I/O line of the VIA can go to something different and unrelated.

4: I'm not sure I understand the question, but really the only relevant priority issue would be with interrupts, and you can sort those out by polling in software. The interrupt flag register (IFR) has a bit for each possible interrupt source. In real-life situations, polling is not as big a job as you might think.

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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 Post subject: [82.3] For 6502 -6522
PostPosted: Mon Feb 26, 2001 7:03 am 
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Uli,

You've mentioned at various times not liking the 65c22 VIA, and without jumping too quickly, I more-or-less sat back to hear more. Tonight I read through the 100+ posts on the forum having to do with 6502.org making a board for the hobbyists. This discussion took place before I was on, and I don't know if the board has materialized. I have a feeling it still has not.

But be that as it may, you seemed to be saying that your primary complaint against the 6522 was the need for buffers. Can you explain? I've never used buffers with it, treating the I/O's like LSTTL I/O. There has never been a problem, except one. When using it as a printer port (while using most of the same I/O bits for other things too), and having the printer plugged in on the other side of the room at the end of a long printer cable and possibly not even on the same 120V AC circuit, once in a blue moon there will bee some kind of spike that will latch up the 65c22. I suppose this could happen to the buffer ICs too if I put buffers on the 65c22's I/O lines.

Other than that, the 65c22's I/O has always been adequate. I seldom connect heavy loads, although I commonly have various 65c22 lines drive a lot of CMOS loads simultaneously at the ends of various connecting lengths of loose wire, ie, neither shielded nor twisted in pairs. On one project, a couple of the lines, again unbuffered, went to several PC boards that used them in a card cage. This was in some automated test equipment that has run with virtually zero trouble or maintenance now all day every day for nearly nine years. When they're connected to only these high-impedance loads, the output bits do come up to nearly 5V when high, without any pull-up resistors.

Unlike earlier 6522's, whether CMOS or NMOS, the WDC W65C22S has true high-impedance (CMOS) inputs at I/O pins that are set to be inputs. As outputs, they're still spec'ed to be able to drive one TTL load. I don't have any experience with them yet to comment from.

Garth Wilson

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The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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 Post subject: [82.4] For 6502 -6522
PostPosted: Mon Feb 26, 2001 12:21 pm 
HI, Garth!

My objection is not limited to the 6522. I dislike using an MOS LSI where the TTL normally used to buffer the outputs will do the job. This is often the case, beginning with the 6520 and 6821 commonly used with 6502's, and includes the 6522, which doesn't do much for you that you can't do without. If you struggle, you can find a way to get benefit from its features, there's benefit in there, someplace, but it's not easy to find. I've found the built-in interrupt or handshake logic to be inadequate in many cases. TTL always works the way it's set up to do. In cases where I needed the handshaking to be truly general, as in a general-purpose I/O board, I've built handshaking logic with a bunch of jumpers, an XOR pack, and a couple of 74HC74's to go with each pair of In and Out ports. I've yet to see an LSI that offered bidirectional handshake lines, nor have I seen one that provided a low-going strobe output for an input port, both of which have turned out necessary more than once.

If you want to drive a relay, transistor, or even a cable you need to buffer them, because the outputs from the MOS LSI have not enough output current to drive a load. Driving the load is what does the useful work. It's much easier to put in a 74LS573 or '574 as the output latches and, likewise as the input buffers, and be done with it, than to isolate the LSI from its load using the same sort of TTL parts that I use as the I/O components. The "high-current" outputs from the MOS LSI are rated at 2 mA. The outputs of the TTL latches are rated to deliver 16 mA. If you need symmetrical outputs (much more general in nature) then you should use HCMOS latches and buffers.

Driving large capacitances is just as much a load as driving DC loads, though it's a little more difficult to specify precisely. Most of the popular single-board computers, e.g. KIM, SYM, AIM, etc, were demonstration boards for their LSI's. Consequently the LSI's were not buffered. What the evaluation notes seldom told you is that in buffering the outputs you limited the functionality of the device. These parts are fine for some on-board I/O. Of course, on-board I/O is like communicating with the buffers. Unfortunately, the TTL/HCMOS buffers are quite inexpensive and not very limiting, while the LSI's tend to be costly and VERY limiting. Once you decide to use a 6821 or 6522, you have to do things the way that part works. You have to set it up and use it within the confines of that setup. The TTL/HCMOS latches and buffers require only that they be written or read.

There's little practical difference between the input impedance of the NMOS and the more recent CMOS. The key is in what you've said here. It's rated to drive one TTL load. That load is the buffer. If you need to drive a cable AND what's at the end of the cable, you need buffers. What you have to concern yourself with is not what it WILL do, which is often quite a bit, but sketchily specified, but what it is rated (SUPPOSED) to do.

Uli


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 Post subject: [82.5] For 6502 -6522
PostPosted: Mon Feb 26, 2001 5:52 pm 
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[Edit, many years later: My experiments with WDC's W65C22S (not W65C22N) show that the port's pin drivers are extremely strong, much stronger than the data sheet lets on, being able to even pull up (not just down) to within 0.8V of the rail with a 19mA load, and 50mA if short-circuited.]


While I would concede that there are times the VIA's output drive is inadequate, those times usually (for me) require higher voltages, most often 12V. For this, I often use comparators. I've had the open-collector LM339 toggle only up to only 4MHz. Although its speed is not impressive, you don't normally need a whole lot of speed on anything running above 5V, and it's very inexpensive and easy to get. If I need a high-side driver, I must additionally use a PNP transistor, or sometimes a "P-channel" power MOSFET. If you need a lot of the higher-power things like this, it becomes attractive to put them on the VIA's serial port since they're not going to be fast parts anyway. The Allegro (formerly Sprague) UCN5823A is an open-collector 8-bit serial-input shift register whose outputs can switch up to 350mA and 100V. The 5821 is good for 50V. I have used these for dozens of relays controlled from a single VIA; but at $4 each, you don't use them where the cheap comparator would do.

There have been a couple of times I just put an 8-bit register or buffer right on the uP bus, but to me, _that_ feels more limiting because they add more capacitive loading to the bus for what you get. The way around this would be to put two or more on a bidirectional buffer; but in spite of all the extra parts, you still can't say "I want the first two bits to be inputs, the next one to be an output...", you still don't get the timers, etc.

If an upgrade to the 6522 were to be offered, I'd like to see possibly a 68-pin PLCC with one or two additional fully-configurable parallel ports (like two VIAs in one package), plus at least a couple of serial ports suitable for RS-232, RS-485, SPI, IIC, and Microwire. Of course as long as we're wishing, we could wish for the moon-- and many microcontrollers have these things and more. But if you want a lot of memory, using so many of the microcontroller's pins to connect this memory means you forfeit much of the I/O that made the microcontroller so attractive in the first place.

WSI offers ICs combining a lot of I/O and memory, but the last time I checked, they still were only fast enough for the slowest 65c02's.

I once worked with a couple of arbitrary waveform generator boards on STD bus that used a Z8536. If I remember correctly, one of the counters determined the sampling speed. Its rollover triggered the second counter which had a nice feature that the 6522 doesn't: its value could be continuously reflected on the pins. These outputs then went to the address inputs of the waveform memory, and the memory's data output went to the D/A convertor. The Z8536 was very difficult to work with and understand though, and it was an incredible power hog. Even in a 40-pin DIP, it would get too hot to touch until we added heat sinks. There was no CMOS version, at least at that time.

Garth

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?


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