See http://biged.github.com/6502js/ which should look like this: There's more to do on the assembler: it doesn't support full expressions for any more cases than I needed for the test. But I know how to add that.
Here's a test program:
Code: Select all
; pi program ported from the 65816 version
; by Bruce Clark as seen on 6502.org
; I/O is memory-mapped in py65:
PUTC = $f001
GETC = $f005 ; blocking input
; easy6502 loads to $0600
*=$600
TMP = $700
S = TMP+1
R = S+1
Q = R+1
P = Q+1
START:
JSR INIT
LDX #359
LDY #1193
L1:
; no PHY on 65Org16
STA TMP
TYA
PHA
LDA TMP
PHA
; no PHX on 65Org16
STA TMP
TXA
PHA
LDA TMP
; no STZ on 65Org16
STA TMP
LDA #0
STA Q
LDA TMP
TYA
TAX
L2:TXA
JSR MUL
STA S
LDA #10
STA Q
LDA P-1,X
JSR MUL
CLC
ADC S
STA Q
TXA
ASL
; no DEC on 65Org16
SEC
SBC #1
JSR DIV
STA P-1,X
DEX
BNE L2
LDA #10
JSR DIV
STA P
; no PLX on 65Org16
STA TMP
PLA
TAX
LDA TMP
PLA
LDY Q
CPY #10
BCC L3
LDY #0
; no INC on 65Org16
; carry is set
ADC #0
L3:CPX #358
BCC L4
BNE L5
JSR OUTPUT
LDA #46
L4:JSR OUTPUT
L5:TYA
EOR #48
; no PLY on 65Org16
STA TMP
PLA
TAY
LDA TMP
CPX #358
BCS L6
DEY
DEY
DEY
L6:DEX
BNE L1
JMP OUTPUT
INIT:
LDA #2
LDX #1192
I1:STA P,X
DEX
BPL I1
RTS
MUL:
STA R
LDY #16
M1:ASL
ASL Q
BCC M2
CLC
ADC R
M2:DEY
BNE M1
RTS
DIV:
STA R
LDY #16
LDA #0
ASL Q
D1:ROL
CMP R
BCC D2
SBC R
D2:ROL Q
DEY
BNE D1
RTS
OUTPUT:
WDM #0
RTS
Comments welcome.
Cheers
Ed
(*)16 and 32bit variants of nmos6502 which I think of as 65Org16 and 65Org32.
(*)6502js is the simulator found in easy6502