BigDumbDinosaur wrote:
GARTHWILSON wrote:
If time and money were no object, it would be interesting to experiment and see how much stress the SMT ones can handle without ripping the foils away.
I see that this socket has a pair of pilot posts that engage holes in the PCB. Presumably they would add some needed stability to the assembly, although it doesn't appear that they would do anything about straight-line pull forces. The PCI(E) sockets on a typical PC motherboard are through-hole with pilot posts and seem to be pretty solidly anchored.
On these that are more hobbyist-friendly (I even have wire-wrap sockets for them), I find I kind of have to rock the module carefully as I pull it out. Otherwise by the time you get enough force to pull all the pins out at once, they suddenly come and you end up bending pins because one end comes out slightly before the other and it comes up and it's crooked. You've no doubt seen that where IDCs were pulled off of pin headers.
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SMT sockets' pins stick out the sides and take more room too (as I see BDD just commented), keeping you from putting other parts as close.
In the case of your DIMM, that's not much of a liability, since the DIMM's effective footprint is slightly greater than that of the socket into which it's plugged (thickness-wise).
True, but few parts would be as tall as the socket itself so as to be able to reach the module, so I don't think there's any concern there.
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Note to Garth: a future enhancement to consider for your DIMM design might be to separately bring out the /WE connection for each SRAM. This feature would allow implementation of hardware write protection with 512KB granularity, instead of the 2MB granularity now available. It means more pins, of course, and thus a slightly larger assembly.
It would take it out to 50 pins which is a more standard size. I wanted to go as small as possible and still have enough distance between the ICs to solder them by hand (which I had to guess). Unless I run out of boards (it would be great to get an order for hundreds of these!), my next products will be something else to facilitate home computer construction. I have ideas, but nothing in the plans yet.
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The SRAM count will definitely add to bus loading and in my opinion, overwhelm the 65C816's ability to drive the buses. The use of aggressive bus drivers (74ABT logic, which packs a pretty good punch and is very fast) should compensate for the loading and, it is hoped, result in stable performance at 20 MHz.
It would be great if you could make it so you could try it both with and without the bus drivers to compare speed.
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The extra RAM would mean that in the early stages of development I wouldn't have to devote a lot of time to being resource-efficient. The time would be better spent on developing and refining algorithms and later on, efficiency gains could get into the picture.
