Hackaday posted about this remarkable study: a 256-processor supercomputer using hundreds of thousands of TTL devices.

There's a 300-page pdf which goes into great detail about the design.

It uses many small ROMs as well as 74S381 ALU devices, 74283 adders and 74S182 look-ahead carry generators. It directly supports single-cycle add, subtract and multiply of single-precision floats, and supports multi-step sequences for double-precision operations. So that's a 24x24 multiply in 400 nanoseconds, if I have it right.

So with all the multiplications and divisions it takes to calculate a trig or log function, a single 20MHz 6502 would still be quite a bit faster (although for 16-bit, not 24-bit) with the look-up tables!

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Edit: there's an interesting graph and analysis towards the end of reliability of the machine. At 70 degrees the mean time to failure is about a day. At some lower but reasonable temperature it gets up to four days. That's reasonable for a very early experimental machine but seems limiting.

Don't forget you still need to build 256 processors and a routing network.

I think the flaw in the plan is that 24-bit lookup tables would be much larger. But it's a fair point that starting with a 20MHz cycle time is going to help... of course those lookup table memories also need to be fast.

As a practical point, building higher precision arithmetic out of smaller building blocks is the necessary missing step for Garth's approach. (On FPGA a 32x32 multiply is trivial to synthesise, although it might not be single-cycle.) The paper goes into some detail about producing double-precision results given a single-precision primitive.

(Reading further into the paper, the cycle time is a bit shorter than I said, but the full multiply operation including normalisation seems to take 3 cycles)

Edit: overall, it's a good read for a feasibility study and an insight into machine organisation and implementation choices.

Cheers
Ed