Here are some scenarios that i tested:
Everything is in RAM. Result "Hello world!".
Code:
MEMORY {
HEADER: start = $C000, size = $0004, type = ro;
ZP: start = $0000, size = $00D0, type = rw, define = yes;
RAM: start = $0200, size = $7E00, file = %O, define = yes;
ROM: start = $C010, size = $3FE0, type = rw, define = yes;
}
SEGMENTS {
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro;
LOWCODE: load = RAM, type = ro, optional = yes;
INIT: load = RAM, type = ro, define = yes, optional = yes;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
BSS: load = RAM, type = bss, define = yes;
HEAP: load = RAM, type = bss, optional = yes; # must sit just below stack
ZEROPAGE: load = ZP, type = zp;
}
Everything is in ROM,but the rom is actuarially writable here. Result " 00".
Code:
#
# kawalski Simulator
#
MEMORY {
HEADER: start = $C000, size = $0004, type = ro;
ZP: start = $0000, size = $00D0, type = rw, define = yes;
RAM: start = $0200, size = $7E00, file = %O, define = yes;
ROM: start = $C010, size = $3FE0, type = rw, define = yes;
}
SEGMENTS {
EXEHDR: load = HEADER, type = ro;
STARTUP: load = ROM, type = ro;
LOWCODE: load = ROM, type = ro, optional = yes;
INIT: load = ROM, type = ro, define = yes, optional = yes;
CODE: load = ROM, type = ro;
RODATA: load = ROM, type = ro;
DATA: load = ROM, type = rw;
BSS: load = ROM, type = bss, define = yes;
HEAP: load = ROM, type = bss, optional = yes; # must sit just below stack
ZEROPAGE: load = ZP, type = zp;
}
Code read only section is in ROM. It doesn't work at all, jmp instruction set to 0000.
Code:
MEMORY {
HEADER: start = $C000, size = $0004, type = ro;
ZP: start = $0000, size = $00D0, type = rw, define = yes;
RAM: start = $0200, size = $7E00, file = %O, define = yes;
ROM: start = $C010, size = $3FE0, type = ro, define = yes;
}
SEGMENTS {
EXEHDR: load = HEADER, type = ro;
STARTUP: load = ROM, type = ro;
LOWCODE: load = ROM, type = ro, optional = yes;
INIT: load = ROM, type = ro, define = yes, optional = yes;
CODE: load = ROM, type = ro;
RODATA: load = ROM, type = ro;
DATA: load = RAM, type = rw;
BSS: load = RAM, type = bss, define = yes;
HEAP: load = RAM, type = bss, optional = yes; # must sit just below stack
ZEROPAGE: load = ZP, type = zp;
}
The HEADER segment doesn't seem to affect the result.