Help,
I'm a college student and i nedd some help.
I need to compare two processors one is the 8086 and the other the 6502, under the following headings:
1)programmable registers
2)jump and call instructions
3)addressing modes.

I can compare the addressing modes easily but i have no idea about programmable registers or jump and call instructions.
Can someone please help me or tell me where i can find the data i need.
Many thanks
Ian Coulson

>1)programmable registers

The 6502 had (3):
A - Accumulator, 8 bits
X - Index 1, 8 bits
Y - Index 2, 8 bits

>2)jump and call instructions

The 6502 had only

JSR (absolute 16 bit)
JMP (absolute 16 bit)
JMP (indirect 16 bit - i.e. absolute 16 bit address is used as the location to read the target location from)

There were also the Branch-on instructions, all relative signed 8-bit:
BMI (minus)
BPL (plus)
BVC (overflow clear)
BVS (overflow set)
BCC (carry clear)
BCS (carry set)
BNE (not equal)
BEQ (equal)

And, not quite "instructions", the 6502 processor had a single interrupt line with a hard-coded vector, and a single non-maskable interrupt with a hard-coded vector.

>3)addressing modes.

These were:
zp = $00 Zero Page
zpx = $00,X Zero page, indexed
zpy = $00,Y
izx = ($00,X) Zero page, indirect (final address read in from target + x)
izy = ($00),Y Zero page, indirect (final address from target read in, then y added)
abs = $0000 Absolute
abx = $0000,X Absolute plus X
aby = $0000,Y Absolute plus Y
ind = ($0000) Indirect (final address read in from target)
rel = $0000 (PC-relative)

WizWom - wandering kernel of happiness
~~~> http://pages.ripco.net/~wizwom <~~~

Don't forget the break instruction.
IIRC this triggered the NMI (non-maskable interrupt) and was a 2 byte instruction, the first (I think) zero, and the second undefined.

It's been - eew - 15 years since I used one of those beasties.

well, you just might be mistaken. IIRC the BRK generates a call to the interrupt vector. It's often used to splice interrupt service calls into a debugger thereby acting as a breakpoint. What a surprise . . . it is called a break . . . and it generates a call to the breakpoint . . . hmmmmm.

Uli

You're right! I forgot to compare processor interrupts:

The 6502 has (3) - 3 hardware and one software.

RST - Reset line
IRQ - Interrupt request, maskable
NMI - non-maskable interrrupt
BRK - software interrupt

All forced jumps to distinct memory locations, hard-wired into the CPU.

>RST - Reset line

>IRQ - Interrupt request, maskable

>NMI - non-maskable interrrupt

>BRK - software interrupt

>
>All forced jumps to distinct memory locations, hard-wired >into the CPU.

I thought they read addresses to jump to from hard-wired memory locations - namely the last six bytes of address space?

The BRK is a JMP 0000; this is hard-coded.
The IRQ, NMI and RST are, as you note, to vectors stored at FFFE; FFFA and FFFC respectively.
http://www.6502.org/datazip/r650x.pdf was my source.

Whoa there!

BRK is not a jump to 0000! It generates an IRQ, with the BRK bit
enabled in the status register (to distinguish it from a real IRQ).
The address pushed is BRK+2. Yep... the RST, NMI and IRQ (BRK)
use vectors in the highest location of memory... but (and its a
big but), while the vectors are being accessed, the address can
be munged with an external circuit.

Ratboy.