Arlet wrote:
... But if you don't want to waste a block RAM on video, you can also make a small RAM out of LUTs. The beauty of the FPGA is that you can also make different decisions for various projects. Have you calculated how much zero page, stack and ROM you need for your project ? Maybe you won't even need all of it...
I wouldn't say waste, especially since this is supposed to be a gaming type development system. I think I misread your earlier statement "Yes, a block RAM. And you'd use the whole thing" a couple posts ago.
I think 512x16 words for zero page, 256x16 words for stack, and 16Kx16 words for ROM (8Kx16 of which would be dedicated to one of the machine code monitors (original 4Kx8) mentioned at the beginning of the thread) would suffice for a most basic "OS". Instead of booting into a high level language like BASIC on the C-64 for example, you'd be "in the guts" already at power on in this system.
I've been mulling over the video part of the project utilizing SDRAM all day at work. A
couple questions...
1) If one can use an SDRAM for video, then surely the concept would be fully understood in order for one to use it more like an asynchronous static ram, say for CPU code storage on a different SDRAM?
If I were to think of what we have been recently talking about regarding FIFO, etc. and try to make this come about using schematics, I would have been daunted and would have quit or tried something easier (like monochrome graphics and a 6845 core. This has been planned for in the layout!). But I think I can grasp the Verilog beginnings, at least my attitude is positive about grasping the concept of putting this in Verilog, which leads me to my last question:
2) Place your cpu.v/ALU.v core at a level 10 of difficulty. What level of difficulty is the type of video interface which we have been discussing?