Aficionados of minimally commented code in unusual languages might like to take a look at this (by Brian Armstrong).

It seems to me fairly small and simple so maybe it's an interesting approach?

He defines 256 pairs of offsets into two lists of functions: a list of operations and a list of addressing modes.

It's a bit difficult to read because there are no symbolic names for the registers, just numeric indices into the state vector for the machine (and indices into index 3 for the status bits updates.) But that's just cosmetic.

Cheers
Ed

My emulator works in a similar way. I use a 256 instruction jump table to a piece of code that consists of two macro calls. For example:

The address macro computes the physical memory address corresponding emulated target address ready for the instruction to access. I had to add a parameter the memory address mode because the PIC I'm using needs to know if the final address will be read (LDA) or written (STA) or both (INC/ROL).

Originally I had two subroutine calls but to minimise execution time I went for macros in the end. I also use the devices processor flags for NZVC and generate P only when needed.

_________________
Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

I had another look at lib6502 and it's sort of similar (but in C.) One difference is that the machinery for handling the next opcode is replicated, so you save the jump. Acorn's emulator does the same - it does cost code space of course.

So: Brian uses a table of function indices; you and Ian both use a jump table; Acorn used a 256-way computed jump (costs more code space.)

Cheers
Ed

Replicating code could also slow it down, if the resulting code no longer fits in the L1 instruction cache.