Right, thanks for pointing that out. Been doing like 5 things at once here. Will definately use the FPGA for that 27MHz source.

So far it looks like everything will fit on a $98 3.8" x 2.5" board. Including all IC's, 2 SDRAMs (if a second is needed), a 40-pin IDE connector, 2 USB connectors, a video DB15 connector, 6-pin SIP JTAG connector, 1 program button, 1 reset button, and a 14 pin socket that can fit either 1 full size can osc or a 1/2 size can selected by jumper.
I have to make a custom pad layout for the 48-pin QFP so I just quickly used a slightly larger 64-pin QFP for spacing purposes.

Was barely able to stuff 2 10-pin SIPs for expansion signals as well.

Will update the parts list...

Note that the video output from the chip is not VGA compatible, so instead of a DB15 you may want to consider an RCA connector for composite output, or an s-video connector.

OK, heh, an S-Video connector is smaller so I will be able to fit that as well as an RCA jack for composite out. I know when I very quickly skimmed over the data sheet, is said it could handle simultaneous outputs...
Trust me I will be much more thorough as this starts to congeal, but here is the general look of it so far: (I already see I need to add a 100uF cap by the 5VDC power in connector in the upper left and put the 2.5V SDRAM closer to the supply, yet still close to the FPGA).

How many layers is this board going to have ? The space between the ICs seems quite narrow given the number of wires you're going to need.

By the way, I've added a new sprite demo video

Nice vid! Seems pretty fast!

Board will have 4 layers. It will be very tight. I will sacrifice nothing. If I run out of room, then I'll have to pay for a larger 4" x 5" board. The price will double.

Time to start schematics.

At work, progress will be slow...

The display runs at about 55 fps. The sprites don't slow it down (if you add too many, it will start dropping them). I'm using my own (new) CPU core, which is a 16 bit RISC design, running at 50 MHz. Next step is to fetch the sprite data from memory, instead of showing red blocks, but first I still need to do some more testing of the current design.

Do you think your board has room for another RCA output for audio ?

Arlet wrote:
...Do you think your board has room for another RCA output for audio ?


Yes I think there's room if I move the right USB, FPGA Prom and FPGA to the right and put the audio connector right next to the left USB. The would put it right next to the CY7C67300. Unfortunately, there is only 1 PWM left. Using the IDE function wipes out the other 3 PWMs.

That's fine, as long as you have an FPGA pin left, you can use that for PWM. It's easier to generate the PWM directly from the FPGA, than first accessing a peripheral chip.

Ah, I see. Then it may be a better idea to use 2 pins and use a 1/4" stereo out jack?

That's a good option too. Are those jacks smaller ?

Yes there almost half size width wise, but a tiny bit longer. I'll go with that and put it on the right side next to the video outs.

I'm not up on my audio PWM techniques, hardware or software. Yet...

FPGA4FUN website has a very short beginners tutorial with some HDL code. Also, I see the Xilinx Spartan 3A kit has PWM Audio along with the 1/4" jacks you typically see in PC's, and also uses the NS LM4550 AC'97 audio codec IC (48-pin QFP, @$7.85ea from DK), which won't fit here. Another interesting IC from TI is the TAS5508 8 channel Audio PWM Processor (48-pin QFP, @$11.50ea from DK). Just mentioning stuff here maybe for a future phase.

I'll try to check out other schematics. I'm sure there must be some analog signal conditioning which may require 1 more IC. Maybe an 8 pin op-amp, which would fit in this design...

Hmmm, I am now starting to remember 'bound' speaking of an 8-bit MOS6581 Core. This would be ideal!...
I found it in his unique thread in the SBC section. He referenced the swinSID.

Will consider this when assigning expansion pins for the 20-pin offboard interface. Will be an other register based stereo audio option! Very nice!

EDIT: Had posted wrong link.

If you let the PWM timer run at 200 MHz, you could get something like 12 bit audio at 48kHz, or 13 bits at 24kHz. Not CD quality, but good enough to produce some decent sounds.

A PWM is nothing but a cyclic counter + comparator. Real easy.

Another technique is to use a Sigma-Delta DAC. This only requires an adder + register. At every clock you do: adder <= adder + value, and use the carry to drive the output pin. This is one line of verilog.

Creating the actual sounds takes some more logic of course, but that's the fun part.