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 Post subject: Program to test RAM
PostPosted: Tue Feb 22, 2011 5:35 pm 
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Posts: 2
Location: Massachusetts
Hello everyone - I have put together a small 6502 computer and I am testing it's functionality at the moment. I have tested that it can read from the ROM chip and execute a tight loop.
I am now trying to test the RAM chips. The system has 2 32K RAM chips.

One is mapped to 0x0000 - 0x7FFF (using all 32K).
The second is mapped to 0x8000 - 0xBFFF (using only 16K).
I have 8 I/Os mapped to 0xC000 - 0xCFFF (each having 512B = 4K)
The ROM chip is mapped to 0xD000 - 0xFFFF (the upper 12K)

I have loaded this code into the ROM chip.

Code:
F300        LDX #$4C        A2 4C
F302        STX $3000       8E 00 30
F305        LDX #$00        A2 00
F307        STX $3001       8E 01 30
F30A        LDX #$90        A2 90
F30C        STX $3002       8E 02 30

F30F        LDX #$4C        A2 4C
F311        STX $9000       8E 00 90
F314        LDX #$00        A2 00
F316        STX $9001       8E 01 90
F319        LDX #$30        A2 30
F31B        STX $9002       8E 02 90

F31E        JMP $3000       4C 00 30


When I run it. It is not doing what I am expecting. Following it on the logic analyzer is useless as it's all over the place and I can't seem to recognize any kind of pattern.

I need a second pair of eyes. I am probably missing something very simple.

Does the above code write a JMP $9000 starting at memory location $3000
and write a JMP $3000 starting at memory location $9000?

This should create an endless loop between the two memory chips.

Thanks in advance for any insight.

Todd

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PostPosted: Tue Feb 22, 2011 7:12 pm 
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The program looks right to me. It sounds like your previous tests give you confidence that the program runs.

Is it worth trying a simpler pattern - even a JMP $4C4C - then you can see if the RAM drives the databus at all. Or try just one RAM, in case one of them is OK. Or just try a loop like
Code:
F300 INC $3000
     JMP $F300

which will test read and write.


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PostPosted: Mon Feb 28, 2011 12:36 am 
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I got it working. It wasn't in the computer after all. It was a poorly set up logic analyzer.

Image

I modified the program a bit. The jmp routines start at $3000(RAM 1), $9003(RAM 2) and $F31E(ROM). This would output (on the lower address lines) $00-$05,1E,1F,20. And that is exactly what it did, over and over and over again :-)

Image

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PostPosted: Mon Feb 28, 2011 6:06 am 
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Kaos116 wrote:
There are 10 types of people in this world. Those that understand binary and those that don't.


That's a great tag line!


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PostPosted: Sat Aug 13, 2011 12:52 am 
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I wrote a small program to test my project's ram without any i/o hardware!
Just put two led diodes on some decoded address, and if it all works both leds should light up!

Code:
DO   STX $8000
     INX
     TXA
     PHA
     BNE DO
     PLA
     PLA
DOO  STX $A000
     PLA
     TAX
     BNE DOO
     SEC
     BCS DO


The code stores numbers from 0 to 255 in the stack, and then it pops them. On every loop, it accesses some address(the address with the led), if it has no ram, it will exit the second loop too soon.


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 Post subject: Say what???
PostPosted: Sat Aug 13, 2011 5:02 pm 
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Dajgoro wrote:
I wrote a small program to test my project's ram without any i/o hardware!
Just put two led diodes on some decoded address, and if it all works both leds should light up!

Code:
DO   STX $8000
     INX
     TXA
     PHA
     BNE DO
     PLA
     PLA
DOO  STX $A000
     PLA
     TAX
     BNE DOO
     SEC
     BCS DO


The code stores numbers from 0 to 255 in the stack, and then it pops them. On every loop, it accesses some address(the address with the led), if it has no ram, it will exit the second loop too soon.

I see only one PHA but several PLAs. Could it be you're smashing the stack and crashing the processor?

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PostPosted: Sun Aug 14, 2011 12:14 am 
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There are two PLA between the two loops, it needs to be at least one, because it stores 0 on the last push(that is when it exits the first loop), so before entering the second loop, it pops the zero so it wont exit immediately, i put two PLA, just to be sure. The code works, i tested it on my 6502 project(unless i mixed something while pasting the code)...


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PostPosted: Sun Aug 14, 2011 12:42 am 
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Dajgoro wrote:
I wrote a small program to test my project's ram without any i/o hardware!
Just put two led diodes on some decoded address, and if it all works both leds should light up!

Code:
DO   STX $8000
     INX
     TXA
     PHA
     BNE DO
     PLA
     PLA
DOO  STX $A000
     PLA
     TAX
     BNE DOO
     SEC
     BCS DO


The code stores numbers from 0 to 255 in the stack, and then it pops them. On every loop, it accesses some address(the address with the led), if it has no ram, it will exit the second loop too soon.


Very strange. If you have a 65c02 (ie, CMOS), you can shorten it by three instructions to:
Code:
DO   STX $8000
     INX
     PHX
     BNE DO
     PLA
     PLA
DOO  STX $A000
     PLX
     BNE DOO
     BRA DO


Quote:
i put two PLA, just to be sure.

You are using the entire page 1 stack area anyway, stepping on anything else that would have been there from routines calling this one. It loops around; so if you're at 1FF and do another PLA, it will go to 100, and another PLA will put it at 101. It does not automatically stop at 1FF. similarly, when the stack is full and S is at 100 and you push another byte, S will then be pointing at 1FF. (The high byte is always 1 but the low byte goes in a circle and it has no concern for any barrier between 00 and FF in either direction.)


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PostPosted: Sun Aug 14, 2011 6:31 am 
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Posts: 250
Dajgoro wrote:
There are two PLA between the two loops, it needs to be at least one, because it stores 0 on the last push(that is when it exits the first loop), so before entering the second loop, it pops the zero so it wont exit immediately, i put two PLA, just to be sure. The code works, i tested it on my 6502 project(unless i mixed something while pasting the code)...


I have no idea what you're trying to do.

The second PLA between the loops means you never write
FF to A000

At the end of the DOO loop you could substitute

BEQ DO

for

SEC
BCS DO

To exit the second loop you need to pull 0 off the stack
but if there's no RAM what's going to drive 0 on to the
data bus? (presumably the stack is in RAM)
Are there pull downs on the data bus?
If not, the data bus may drift to 0 with nothing driving it
Or it may get pulled up (I can't remember how NMOS
behaves)
Or it may float around what ever was last on the bus
(the PLA instruction)


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PostPosted: Sun Aug 14, 2011 2:59 pm 
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Quote:
To exit the second loop you need to pull 0 off the stack
but if there's no RAM what's going to drive 0 on to the
data bus? (presumably the stack is in RAM)
Are there pull downs on the data bus?


If there is no ram installed, then when it reads form ram all other devices must be in high-z, so it can only read interference, or noise, in my case usually it reads 50Hz form the power grid(toggling 00 and something)(or maybe something is pulling down?). So when i try to run this with no ram, the loop is short that the led of the second loop is very dim.
If anything is wrong with the ram the two leds should not light up to the same intensity.
I agree that the code can be optimised, i wrote it like that, so i can be sure it would work at first try.

I don't have a 65c02, the UM6502 was cheaper on ebay(for testing i use the CM630P (clone), so if something goes very wrong i don't kill the...).


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