Hi all,

I'm going to start playing a bit with a newly-purchased 65C02 (W65C02S6TPG-14) on a breadboard and wanted to be sure about clocking the thing. I would like to take an 8MHz can and a 74HC393 from the parts bin to create a 1 MHz signal. Will the 65C02 handle this ok as a clock input?

I've searched the forum here, and several messages indicate that the clock input MUST have rise and fall times of 5 ns or less. Other messages indicate, though, that the rise and fall times don't matter since the WDC 65C02 has a Schmidt trigger input on PHI2. Which is correct?

Thanks for any help,
Tom C.

For the 65c02 (not the '816), you can even hang a resistor and capacitor on the pins to use its own internal circuitry to oscillate if the frequency is not critical. 5.6K and 68pF will get you in the 1MHz neighborhood.

As for frequency range, you can take it all the way down to DC.

Thanks, Garth. So it's the 65C816 where clock slew rate is critical, then?

You'll have to have a pretty clean clock source for the '816 because it's the clock for the whole system. The 6502 however takes the input and, from that, generates its own system clock.

Any problems from the clock being sloppy on the '816 will get amplified by building practices that are not suitable for fast parts. If you breadboard it, use wire-wrap, definitely not hoops of wire plugged into the holes in a solderless breadboard. Put parts close together and keep your WW wires short, cutting each to the shortest length you can without straining the wire. You can get breadboard material with a plane on one or both sides. For this application, I would recommend at least one plane layer (for the wire-wrap side) and use it for ground.

Got it: clock slew rate important for 65C816. Clock slew rate not important for 65C02.

Unfortunately I don't have any wire-wrapping equipment or experience, so I'll stick with the kind and gentle 65C02 for now and (attempt to) subdue the fickle and tempestuous 65C816 later. :)

With fast parts you'll still have to use good construction techniques. The only difference between the '02 and '816 here is the clock input.

Actually it is important for the 65C02 as well, although "important" is a function of clock speed.

The WDC data sheet does say clock rise and fall time should not exceed 5 ns. Now, as Garth has pointed out in the past, "You can get away with murder at one megahertz." Most likely, you don't have to adhere to that 5 ns spec at one MHz. However, crank the clock up into double digits (Fmax at 5.0 V can be as high as 20 MHz) and I can guarantee you that timing trouble will ensue.

Further notes about clocking the 'C02. Here's an excerpt from the WDC data sheet:

3.8 Phase 2 In (PHI2), Phase 2 Out (PHI2O) and Phase 1 Out (PHI1O)
Phase 2 In (PHI2) is the system clock input to the microprocessor internal clock. During the low power Standby Mode, PHI2 can be held in either high or low state to preserve the contents of internal registers since the microprocessor is a fully static design. The Phase 2 Out (PHI2O) signal is generated from PHI2. Phase 1 Out (PHI1O) is the inverted PHI2 signal. An external oscillator is recommended for driving PHI2 and used for the main system clock. All production test timing is based on PHI2. PHI2O and PHI1O were used in older systems for system timing and internal oscillators when an external crystal was used.

Emphasis added.

The ideal way to generate a Ø2 clock with sharp rise and fall is to feed the output of a TTL can oscillator into a 74ABT74 flip-flop, with the oscillator output feeding CLK, and D connected to /Q. Your Ø2 clock signal is taken from Q and will, of course, be one-half the oscillator frequency. The 'ABT74 output slew rate is sub-ns at 5 VDC, so you won't have to sweat the 5 ns requirement. BTW, if you need an opposite phase clock for some reason you can get it from /Q on the flop.

Lastly, keep lead lengths to a minimum between your clock generator and the MPU. Significant reactive effects with hand-wired boards can be a problem and result in waveform distortion that may increase rise and fall to an unacceptable level. Also, ringing can be introduced that will result in instability or total failure to operate.

_________________
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Ok, thanks BDD. So no matter what the clock speed, then, it sounds like best practice to get rise and fall times as crisp as possible. No ABT in my parts bin, though. I'll try feeding the can into a 74AC14 and see what the transitions look like on the scope.

Thinking ahead: if I get a 74ABT74 can I use both flip-flops to divide by four or would there be signal interference between the two at high frequencies?

You can use a 74AC74 if you want. The rise and fall won't be as fast as the ABT part, but will be okay up to at least 8 MHz (16 MHz oscillator). I can't tell you how well a Schmidt trigger inverter like the 'AC14 might work, as it is level-sensitive and the duty cycle achieved might not be exactly 50-50 due to input hysteresis.


You can do that but why would you? There is an advantage to running higher oscillator frequencies, up to a point. However, if you wanted to run the MPU at full throttle (20 MHz), you'd be running an 80 MHz oscillator.

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!