Hi all,
I am making a new 6502 based module to be used in my many homebrew projects. If you're not to busy I would appreciate you input on the design before i send it for PCB production.

Basically it is using a QFP version of the 6502 together with a 4M FLASH memory, a 32KByte SRAM together with a 16V8 PLD that does the chip enabling and does some tricks with the FLASH signals to allow the FLASH to be programmed from the outside.

The FLASH banking mechanism must be implemented outside the module but must reside within the $8000 - $FFFF address space. The SRAM occupies space between $0000 - $7FFF. To allow for external peripherals to be inserted into the address space there are two signals that disable the module memories *ROMDIS and *RAMDIS allowing external peripherals to be "injected" into the memory space.

3D image


Schematic
http://www.allthings6502.com/images/images/6502mod.pdf
Soo, comments are welcome.
/Pontus

Make sure you use the phase-2 input to your GAL for combinatorial (not registered) logic for enabling the writing to RAM, and leave it out of the select logic for any 65xx I/O ICs that already have a phase-2 input (like the 6522). The GAL's phase-2 input should normally be the one you're calling PHI2O also, since that's the reference for most everything on the timing diagrams on the datasheet.

If you're going to use an open-drain-type IRQ pull-down scheme, your IRQ resistor will need to be lower, like a 2.7K or 3.3K instead of 27K. Otherwise the IRQ line may float up too slowly after it is released, especially since you have IRQ on the connector to the outside world which makes for unpredictable capacitive loading. Then fast clock rates can result in the processor being ready to accept interrupts again after an interrupt-service routine (ISR) before the line may have floated up, depending on how long before the RTI your ISR turned off the interrupt condition. I got bit by that one many years ago.

Be sure to pull SO\ up.

If you're doing this as a new project, I would really encourage going to the 65816 instead of the 6502. Actually, you could have a few jumpers to make the board accept either one; but the '816 opens up a lot of possibilites that did not exist on the '02. And for many things, it's just much easier to write the code for the '816. Note that you don't have to latch, decode, or use the bank byte if you don't want to. It gives big advantages even if you only use the first 64K of address space.

Good luck on the project. It's nice that prototype PC boards now are affordable from a few places like ExpressPCB and PCB Express. I still get those two companies mixed up, but they both provide inexpensive prototype board services with no tooling charge.

Garth,

Thank you for your input, that was a good catch with the PHI2 input to the GAL. I would have missed that for sure =) The interrupt inputs will most likely be driven by a push-pull output configuration. The resistors are simply there for giving the signal a defined input when it is not connected to anything.

SO/.. check.

I will look into making it possible to have the board accept a 65816 also. if it's no biggie I will probably do it.

The reason for making the board as it is, is that I have a lot of these devices from previous projects so the only cost would be the PCB's.

Many thanks
/Pontus

Got my first proto boards today. They look really nice =)
I hope I will have some spare time this coming weekend to start assembling them. No 65816 support this time though, I have some better ideas for that fellow.



/Pontus

This can be implemented in the addressing logic, but when I wanted to do a giant sized memory, I decided to keep the upper 16K locked to the original program and the lower 16K to be page flipped. That way, you do not need to duplicate code for each program page, and the program has a place to reference.

_________________
"My biggest dream in life? Building black plywood Habitrails"

OK, not really sure what that last post meant

Anyway, I got the little bugger mounted this morning. Here are the results.




Now all I have to do is to build a FLASH programmer that can program the on board FLASH =) Easy.........

/Pontus

I've performed the first test of the new module..... applying power to it
The oscillator starts and the MAX825 (the reset generator) generates a good looking reset pulse. The PHI2 signal starts ticking and it does the reset vector fetch, which of course is $FFFF since the FLASH still is empty. But I would say a good start anyway.

The programmer is coming along so I will hopefully get some software to run soon as well.

/Pontus

Any updates?

Garth,

The project was completed some time ago, I forgot to update this thread . I finished the standalone programmer that allowed me to program the on board flash memory and wrote a boot loader that reside in a protected page of the flash. This together with a resident noice debugger monitor and a target board made it very easy to develop my application. This particular module have replace an Atari 600 monitoring and controlling my pellet furnace.

When I have the time I will start working on a module using 65C816, FLASH/SRAM and a FPGA with some useful I/O (SPI, UART, timers etc) stuff in it.