enso1 wrote:
Hoglet: are you sure?
Fairly sure....
enso1 wrote:
But please show me I am wrong -- I would absolutely love a dual ported BRAM!
OK, can you check in the Gowin device selection window that you have the "C" version of the part selected:
Attachment:
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With this, in the Place & Route report I'm seeing this:
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Screenshot from 2024-08-21 19-20-05.png [ 5.58 KiB | Viewed 1080 times ]
There is a total of BSRAM 20 used out of 26 (77%)
SDBP is Semi Dual Port BSRAM (one write port and one read port)
DPB is true Dual Port BSRAM (two independant read/write ports)
This example is from AtomFPGA, where the true dual port RAM is the 8KB frame buffer, hence it using four BSRAMs (16Kbit each).
Now, it turns out in this case I ended up instantiating this using the DPB primitive, rather than inferring it:
https://github.com/hoglet67/AtomFpga/bl ... ram_8k.vhdI don't remember why, but possibly because trying to infer it didn't work.
But anyway, I'm pretty convinced the device does have dual port BSRAMs, and it's the tools that are being problematic.
Dave