Further to Gfoot's thread "SPI EEPROM boot for 6502" wherein I threatened to "cogitate further and hopefully come back with some useful contributions", please find below the draft of 65BOOT. This is a solution for booting an otherwise ROM-less 6502 SBC from a small SPI EEPROM, without resorting to a microcontroller or CPLD/FPGA. Due to the size of bootloader images accomodated by this solution, it would have to act as a 1st stage that then fetches a 2nd stage from somewhere else. I have not had an opportunity to build it yet, but the simulator results are promising.

Comments, thoughts and improvements welcome.

Features:

1. The logic is entirely implemented in 74LVC logic chips currently available to purchase from Mouser.
2. It uses standard 256-byte SPI EEPROM chips. The Microchip 25AA040A (512-byte) and 25AA020A (256-byte) were used for reference, but other manufacturers' compatible parts should be fine too.
3. It works by grabbing control of the bus and DMA'ing the EEPROM's contents into RAM before the processor begins booting.
4. The design includes only the minimum I/O signals to achieve the purpose, leaving detailed integration to the SBC's designer. This has been done to maximise flexibility by making as few assumptions as possible about the memory map of the host SBC.
5. If the 25AA040A (512-byte) EEPROM is used, then changing jumper JP1 allows the user to select from two different 256-byte images stored in the EEPROM. If the 25AA020A (256-byte) is used then JP1 must be set in the pins 1-2 (GND) position.
6. All outputs except ACTIVE_OUT and ~RST_OUT are tristate when the 65BOOT is dormant (indicated by ACTIVE_OUT being low).
7. Takes 4097 clock cycles to complete, or about 4ms at 1MHz.

Gotchas:

1. The first three bytes of the EEPROM image are not copied into RAM, instead they will be set to zero. Thus the bootloader program can only actually be 253 bytes long, not 256.

Requirements:

1. The SBC must connect the main clock to CLK_IN.
2. The SBC must route any external or start-up source of RESET into the ~RST_IN pin. The ~RST_OUT pin should go to the actual 6502 processor and any peripherals that require reset. The 65BOOT uses this arrangement to start itself when external RESET is released, but still hold the processor in reset whilst it copies the bootloader.
3. When the ACTIVE_OUT pin is high, the SBC must: ensure all other devices on the data bus are tri-stated; the low half of the address bus is tri-stated; the upper half of the address bus is held in desired state for where the bootloader will be copied (most likely 0xFF); The ~WRITE_OUT pin has exclusive control of the ~WE input (or equivalent) of the RAM to which the bootloader will be copied; any other control inputs (OE, CE) to the said RAM are appropriately set. As an example, the databus and address bus could be handled by routing ACTIVE_OUT to BE on the 6502 and having pull-ups on A8-15.

Opportunities:

1. Buffer U19 exists only to disconnect the address output from the SBC when the 65BOOT is inactive. If the the SBC can handle this some other way, then U19 could be deleted.
2. Shift register U22 exists only to make sure that the SPI EEPROM addresses match the RAM location they get stored in. If U22 is removed they would be shifted by three (i.e. EEPROM location 0x00 would be stored in RAM location 0x03). This chip can thus be removed if the bootloader stored on the EEPROM is adjusted to take this shift into account.
3. If ACTIVE_OUT being active low would be preferable (make the SBC designer's life easier), buffer U13 could be easily converted to an Inverting Buffer - opinions?

To-Do:

1. The schematic is a draft to show the key components and their relationships, it is therefore missing connectors and passives that would be required in a full design.
2. Once full schematic is in place, a more detailed timing analysis needs to be done to ensure it can work at reasonable clock rates - and find out what the cap on clock speed would be.
3. Then do a layout, get it built, and test it for real!

_________________
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Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.

Cool, I like it!

But just to be sure, is U22 the 'address' and U4 the 'instruction'?

Yes, that's correct.

_________________
Want to design a PCB for your project? I strongly recommend KiCad. Its free, its multiplatform, and its easy to learn!
Also, I maintain KiCad libraries of Retro Computing and Arduino components you might find useful.