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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I discovered today, to my great surprise, that ISA edge connector sockets are still available - Digikey has five pages of 'em.

Not cheap, but something else to consider. Of course, you don't have to meet the ISA signal and voltage specs, you can roll your own.

Neil

That's very interesting. It would make the build feel very professional. I haven't looked around in the Kicad (8) library for ISA sockets footprints yet, but hopefully they adhere to some standard and are present. I have no idea how to go about rolling my own footprint being sure that it would fit

That being said, I decided to go for serial on board on this card (doing final verifications before order) but I might design another in the future and then all these options are great.

Well, there's certainly a PCB edge connector pattern. The socket looks like just two rows of pins on 0.1" centres.

Neil

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

I have been thinking about this for a while. Having a PCB with an edge connector and then a connector that accepts heavy cords like VGA-cables etc must put an enormous stress on the edge connector and socket. Also my apartment is a total mess so bumping is a high probability . Interesting, if/when you get around to building this, updates are most appreciated.


Yikes, on PCBWay, clicking "Edge connector: yes" added $370 to the cost on a 100x100mm 4-layer PCB design. (Their explanation makes me assume it's the gold plated option: "Edge connectors achieve electrical connection by contacting the golden fingers on the PCB. If your design includes golden finger, please check 'Yes' for this item and select the surface finish method and bevelling angle for it. Otherwise, please check 'No'.")

Might need to get me a crimper and experiment with this. I still suck at making cables so I need the practice anyway Seems like a good option especially for a prototyping stage build.

Where does Vcc come into this equation? I read on Garth's primer he recommends sprinkling Vcc evenly across pins, although perhaps not as frequently as Gnd. Would it suffice to substitute a few of the Gnds, or consume a few of the signal wires?

Hmm ready made cables seems to be in the 200 mm range so maybe transmission line effects need to be taken in to consideration then.

Pardon my electro-newbie questions, as I am a software guy at heart

This is how Blue August's I/O card is connected to the main board, and also how Garth recommends[1] doing it in the Primer. IDC connecters can be quite large, which gives you lots of pins for interleaving ground wires like BDD is talking about.



[1] If he can't talk you out of doing it at all

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"The key is not to let the hardware sense any fear." - Radical Brad

Thanks for the link! Just to be clear I am not talking about exposing the processor bus, I would have to invent my own kind of bus which is a problem to solve in it self (using buffers/registers or whatever to cleverly catch a write to a specific address range, then expose the other side of that to the outside world using some connector). But I think such external bus circuitry would become quite complex, especially if both read/write is to be supported. This is one of the reasons I decided to switch direction and move the shift-register-to-address+data logic onboard and expose only the serial bus to the SBC (specifically the shift register on the 65C22). If it was to be used only for graphics, instead of doing the external bus circuitry, might as well use the board space to integrate VGA into the SBC.

I much prefer using SPI wherever possible as it is dead simple to implement. That being said the idea of external buses which are separate from the CPU bus is an intriguing subject.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

Slightly OT: Not meaning to discredit everything that has been suggested in this thread, I have been thinking about my future SBC implementation, and the way forward. Changes I am considering:

* Simple On-board VGA using dual port RAM
* Adding a multitude of 65C22 to take advantage of among other things 16 bidirectional pins + shift register per package. Using these pins for all stuff that does not fit naturally in to RAM such as scroll registers, background color, vertical raster position etc etc.
* Exposing only SPI (for example using 65SIB)/SNES controller port/Audio to the outside world
* Ditching the 65C51 and use a MAX3100 connected to one of the SPI ports.
* Trying to cram up the CPU speed as much as possible.

End of OT

You are right SPI would be mostly for existing peripherals I think. I agree I think the 65C22 (or a set of) is the way to go too. It _does_ sound like an interesting software project. I guess the software complexity comes down to how generic the bus needs to be.

Ok I feel I am derailing abit from the original subject. Theoretically one could send a write pulse through the shift register of the 65C22. If it takes ~15 cycles for it to propagate, one could immediately after write a 24-bit value to three ports on the 65C22 before that pulse would reach the receiver, triggering a write of whatever was sent on the 24-bit port. Not sure how to deal with that on the other end though. Sorry about drifting away from the original subject. I got a bit excited

EDIT: the A,X,Y regs might not be enough to do such a thing, but perhaps the SR can be used for write pulses/clocking rather than flipping a pin on the 65C22.

EDIT2: Hmm maybe this is what the handshaking pins on the 65C22 are for. Pardon my ignorance, I need to read up on this.