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fachat
PostPosted: Fri Jun 14, 2024 7:38 am 
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I just got an end-of-life notification from mouser for this https://www.mouser.de/ProductDetail/955-W65C22N6TPLG-14

It's the N-version of the 6522, in PLCC package. N-version means that it's electrically compatible with the NMOS 6522.

I understand that anything PLCC is not NMOS by origin - except maybe for my Micro-PET clone where I use PLCC to save board space - so, it's a reasonable decision to set it to end-of-life.
In my Micro-PET I think I can use the S version also.

The DIP-40 N-variant is still available and not end-of-life (yet...): https://www.mouser.de/ProductDetail/Wes ... 22N6TPG-14

André

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BigDumbDinosaur
PostPosted: Fri Jun 14, 2024 5:57 pm 
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fachat wrote:
I just got an end-of-life notification from mouser for this https://www.mouser.de/ProductDetail/955-W65C22N6TPLG-14

Same notification is on the English version of the product page.

Quote:
It's the N-version of the 6522, in PLCC package. N-version means that it's electrically compatible with the NMOS 6522.

On the other hand, the S-version has plenty of stock and no EOL notification.  I'm guessing WDC’s inventory of the most recent run of N-version production is almost depleted, and no more production is planned.

Quote:
In my Micro-PET I think I can use the S version also.

Other than the totem-pole IRQ output, I don’t see any technical issues with using the S-version...and adapting for the totem-pole IRQ is trivial.

One thing in the S-version’s favor is it has the T6 core, which is the same as used with the current versions of the 65C02 and 65C816 (the 6 refers to the 0.6µ geometry).  At least in the 65C02, plasmo has demonstrated that the T6 process can be run in the 30 MHz range.  I wouldn’t be particularly surprised if the 65C22S could run at least in the 20+ MHz range.

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fachat
PostPosted: Mon Jun 17, 2024 10:56 am 
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One question that came to my mind - maybe not relevant for most schematics, maybe not even making sense, I didn't look up the details in the datasheet (which I remember are not very good in that aspect):

Could it result in problems when interfacing a 5V W65C22S with a 3.3V CMOS device? I know that driving 5V TTL inputs on devices like 74HCT with a 3.3V CMOS output works, as the min Voh of the CMOS is still over the max Vih of the TTL input. In one of my boards, I drive the address and select lines on a 5V W65C22N from a 3.3V CMOS FPGA, basically relying on what has been long experience (but not fully documented IIRC) about the 6522 inputs (data bus is going through a level converter, as it's bi-directional)

Would that potentially give problems when replacing the N with the S-type 6522?

André

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J64C
PostPosted: Mon Jun 17, 2024 11:59 am 
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I can vouch that driving from a 3.3v CPLD to a 5v W65C22 works fine. It’s how I’m doing it in my own board, running at days at a time with no issue at 25MHz.
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fachat
PostPosted: Mon Jun 17, 2024 12:23 pm 
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J64C wrote:
I can vouch that driving from a 3.3v CPLD to a 5v W65C22 works fine. It’s how I’m doing it in my own board, running at days at a time with no issue at 25MHz.


Are you using the S or N variant?

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J64C
PostPosted: Mon Jun 17, 2024 11:47 pm 
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Sorry, I forgot to specify. I'm using the 'S' variant.
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kernelthread
PostPosted: Wed Jun 26, 2024 9:29 pm 
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According to the data sheet, the W65C22N has TTL input thresholds (high >=2V, low <=0.8V) whereas the W65C22S has CMOS thresholds (high >= 0.8VDD, low <= 0.2VDD). That seems like a big difference to me. OK, in reality the threshold for the W65C22S is probably near 0.5VDD, but still significantly different from the W65C22N.
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BigDumbDinosaur
PostPosted: Thu Jun 27, 2024 1:27 am 
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kernelthread wrote:
According to the data sheet, the W65C22N has TTL input thresholds (high >=2V, low <=0.8V) whereas the W65C22S has CMOS thresholds (high >= 0.8VDD, low <= 0.2VDD). That seems like a big difference to me. OK, in reality the threshold for the W65C22S is probably near 0.5VDD, but still significantly different from the W65C22N.

Bill Mensch has said that the input threshold for the WDC microprocessors is at ~50 percent of VCC, which was verified by some testing that Jeff did.  I’d expect the 65C22S would have a similar threshold.  Helping matters is the fact that devices with TTL-compatible outputs can theoretically reach VOH = 3.4 if lightly loaded.  That, of course, easily exceeds the 50 percent level.

In a 65C816 system, more robust operation will be achieved with the use of a data bus transceiver with TTL-compatible inputs, e.g., a 74AHCT245, as depicted in the 65C816 data sheet.  The transceiver will also help to eliminate the risk of bus contention on the rise of the Ø2 clock during a read cycle.  The same transceiver could be used with the 65C02 if there is concern about a device’s output being on the weak side.

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fachat
PostPosted: Thu Jun 27, 2024 4:04 am 
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My main concern would be the use of a W65C22 with 5V supply, but the address, select, and control lines being driven by a 3.3V CMOS output.

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BigDumbDinosaur
PostPosted: Thu Jun 27, 2024 6:23 pm 
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fachat wrote:
My main concern would be the use of a W65C22 with 5V supply, but the address, select, and control lines being driven by a 3.3V CMOS output.

Based on what Bill Mensch has said about input thresholds, that would appear to be workable—if you can live with a reduced noise margin and the possibility that parasitic capacitance might give you some timing headaches.

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