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PostPosted: Sat Dec 02, 2023 4:03 pm 
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BigDumbDinosaur wrote:
You could drive a printer from it, as has been done on UNIXish systems since time immemorial.  :D  I have one of the serial ports on my POC unit linked to one of my Linux boxes, which is how I transfer software to the POC unit.  Unlike USB, TIA-232 really is the “universal serial bus.”
Yeah! I remember one old thread where people were using POS (not POC! :) ) receipt printers kind of like mini-teletype machines. Hooking one of those up to the serial port for out put would be a cool retro-project.

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I’d like to run WOZMON, too.

Why?  In its day WozMon was okay, however, better monitors exist.  If it were me planning software for your machine, I’d be using Jim Butterfield’s Supermon.  Porting it to most 6502 systems is relatively painless and in the process, you gain more functionality than available in WozMon.[/color]
Why not? Or, so what? WozMon is small, relatively easy to understand, thoroughly analyzed (in fact, Ben Eater has 3 videos about it), historically important, and, as John Lyons would say, "intrinsically interesting." The hour or two it took me yesterday afternoon to add it to my system image and tweak it to work with my hardware configuration was not misspent time. I already have a somewhat clunky and more full-featured monitor (PAGIMON). Of course, it's 4+ times the size of WozMon...

If we're talking about "ultimate" software plans (to loop back to Chad's question), in the long run I want to go through the XINU book and write a real mini-UNIX for it. And also go through "Threaded Interperetive Langages" to write a FORTH-like system for it.

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PostPosted: Sat Dec 02, 2023 4:11 pm 
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> intrinsically interesting
a fine phrase!


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PostPosted: Sat Dec 02, 2023 8:14 pm 
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Paganini wrote:
I remember one old thread where people were using POS (not POC! :) ) receipt printers kind of like mini-teletype machines.

It's at viewtopic.php?f=4&t=1536 .

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PostPosted: Fri May 31, 2024 4:37 pm 
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I wonder if anyone would be interested in helping me solve a puzzlement I have encountered.

I recently built this breadboard computer. It is yet another iteration of the design I've been tinkering with since Peanutbutter-1. It works very well at a sedate 4MHz, which is what it's vintage CMD components are specced for.

This week I unpacked Blue August. You may remember I never quite finished Blue August to the point where I was satisfied with it, so I set about updating its design to make it the same as the breadboard computer so that they can run the same firmware. This was not such an arduous task; they were already fairly similar. Other than switching out one logic IC, I only had to redo some control-logic wire-wraps and change a bank of pull-ups into pull-downs.

Anyway, my goal here is to get this board working with Jeff's clock stretcher. The version I use is the same as the one from Jonathan Foucher's "Planck 6502 Computer." For now I have Blue August running really slowly for trouble-shooting purpose. The fast clock is 4MHz, and the fast/slow clock is 4MHz/1MHz. Here's the puzzlement.

If the CPU's clock input is the fixed clock, everything seems to work OK. If I switch one wire so that the CPU's clock input is the variable clock, I/O is never selected. ROM accesses still work, and I can see on the scope that the clock stretcher is working. But the I/O signal never goes low.

I'm mystified. I'm not even sure what the next trouble-shooting step should be.


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Blue August 3.pdf [335.5 KiB]
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PostPosted: Fri May 31, 2024 5:44 pm 
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Paganini wrote:
I wonder if anyone would be interested in helping me solve a puzzlement...

Before you get too deep, take a very careful look at how you have R7 in the circuit.  You have an electronic train wreck waiting to happen. :D

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PostPosted: Fri May 31, 2024 6:25 pm 
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I set about updating its design to make it the same as the breadboard computer so that they can run the same firmware.
Sounds as if you updated the new computer to match the breadboard computer, then subsequently modified the new computer to include the clock stretcher, is that right? Between these two steps, were you able to run a test?

Sorry not to give this my full attention right now... ATM I'm in the middle of another project. (I have 8 liters of home-made yogurt almost ready to go in the incubator!).

I see BDD has posted.. dunno where R7 resides, but hopefully it's a solid lead (and not just a schematic typo that doesn't actually reflect reality)...

-- Jeff

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PostPosted: Fri May 31, 2024 6:41 pm 
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BigDumbDinosaur wrote:
Paganini wrote:
I wonder if anyone would be interested in helping me solve a puzzlement...

Before you get too deep, take a very careful look at how you have R7 in the circuit.  You have an electronic train wreck waiting to happen. :D
LOL good point. That is not, however, how it is actually wired. Nice catch, though. Here is a corrected schematic.

Edit: Hopefully there are not too many mistakes like that in my schematic. Let me know if you see anything else suspicious! Makes it kind of hard to help debug if you're working from bad info.


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Blue August 3.pdf [335.11 KiB]
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Last edited by Paganini on Fri May 31, 2024 6:49 pm, edited 1 time in total.
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PostPosted: Fri May 31, 2024 6:46 pm 
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Dr Jefyll wrote:
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I set about updating its design to make it the same as the breadboard computer so that they can run the same firmware.
Sounds as if you updated the new computer to match the breadboard computer, then subsequently modified the new computer to include the clock stretcher, is that right? Between these two steps, were you able to run a test?
That is correct. Or, rather, the clock stretcher was there on the board from the original design, but I didn't connect it until after testing with a fixed clock.

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Sorry not to give this my full attention right now... ATM I'm in the middle of another project. (I have 8 liters of home-made yogurt almost ready to go in the incubator!).
No worries! I could use some yogurt right now!

I narrowed the problem down to the comparator. I guess there is something I don't understand about interfacing LSTTL with CMOS. I replaced the F521 with an HC688 and everything works fine. Of course the HC688 is much slower than the F521.

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PostPosted: Fri May 31, 2024 11:45 pm 
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Welp, it's a little bit sad. I have unverified a hypothesis.

A line in the data sheet made me think that my good old 4MHz Rockwell ACIAs might not care about the system clock when they weren't selected. (It says something to the effect that their internal operations are governed by the baud-rate generator oscillator, and only their transactions on the system bus are governed by Ø2). I had hoped that maybe I could get away with hanging them off of Jeff's Amazing Slow-Downer along with the ROM, thus getting around using buggy WDC ACIAS.

But I think I've verified that that doesn't work. My serial port works great at 4MHz / 1MHz. It works with a few glitches at 5MHz / 1.25MHz. It doesn't work at all at 12MHz / 3MHz. Basically, as long as the fast clock is at, or near, its spec, the ACIA works. Meanwhile my VIAs (which are regular 14MHz WDC ones) continue working fine when the ACIA gives up.

Going forward, I guess that means I'll have to just suck it up and use a WDC ACIA, or build George's clock-speeder-upper. Blue August doesn't actually have room for the clock-speeder-upper, so I would have to start from scratch, or build a plug-in module.

I guess I might also be able to build a plug-in module to add one of BDD's favorite UARTs. I will have to have a bit of a think. Meanwhile, at least I finally have a working board that's able to go pretty fast... at least with the ACIA disabled!

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PostPosted: Sat Jun 01, 2024 12:37 am 
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Paganini wrote:
A line in the data sheet made me think that my good old 4MHz Rockwell ACIAs might not care about the system clock when they weren't selected. (It says something to the effect that their internal operations are governed by the baud-rate generator oscillator, and only their transactions on the system bus are governed by Φ2). I had hoped that maybe I could get away with hanging them off of Jeff's Amazing Slow-Downer along with the ROM, thus getting around using buggy WDC ACIAs.

Yes; as far as I know, all brands of ACIA require the system clock to do their thing.  The baud-rate generator clock only controls the shifting speed, while other internal operations need the Φ2 running, even when you're not accessing the ACIA via the bus.

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PostPosted: Sat Jun 01, 2024 7:42 am 
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In danger of repeating myself - scrap the ACIA and use a UART.
(Although last time I looked I only found PLCC through hole parts, no DIP anymore)

Anyway. It's such a better chip, and still available at higher speeds.

André

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PostPosted: Sat Jun 01, 2024 1:47 pm 
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Hopefully not too far off-topic... I came across an interesting UART implementation on a $2 PIC uC recently. It emulates the PIA interface on an Apple 1 and uses a couple PIC 'CLC' (Configurable Logic Cell) modules and the 'DSM' (Data Signal Modulator) module to provide clock stretching during UART access. It also provides a 1, 2, or 4 MHz CPU clock and a 256 byte RX character buffer along with Xon/Xoff flow control to manage and control USB serial packets/streams.

It seems to work well and it's kind of neat to load and run (unaltered) Apple 1 software at higher baud rates and a 4-MHz CPU clock. I have not tried it at higher clock rates.

Mike, K8LH


Attachments:
Crab_Apple_1a.png
Crab_Apple_1a.png [ 945.95 KiB | Viewed 814 times ]
xUART65 A1 rom (2).png
xUART65 A1 rom (2).png [ 168.28 KiB | Viewed 814 times ]
Crab_Apple_1b.png
Crab_Apple_1b.png [ 60.93 KiB | Viewed 814 times ]
Startrek session.png
Startrek session.png [ 47.28 KiB | Viewed 814 times ]
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PostPosted: Sat Jun 01, 2024 3:03 pm 
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That's pretty cool. I like your 3-input NAND glue logic too!

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