The data sheet I have states:


Is the reset considered an interrupt; that is, does VBP behave the same way? I may have an idea to drop IO into most of the top page of the memory, but overriding it back to eeprom/ram for booting and interrupts.

Thanks,

Neil

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Thank you!

To add a bit more it behaves almost exactly like an interrupt.

The first cycle 'fetches' the RESET op-code and sets SYNC (I tend to get a value of $FFFF on the address bus but I don't know where that comes from; the op-code fetched is ignored*).
The second cycle is doing an internal operation like any other interrupt (the address bus has whatever the last value the program counter was before the reset).
The next three cycles 'push' the program counter and status register onto the stack (but it does reads instead of writes; the stack continues from the value it had before the reset).
The last two cycles fetch the interrupt vector and $FFFC then $FFFD appear on the address bus.

* I don't think the first cycle is always $FFFF I vaguely remember that sometimes it is the old program counter and that it might depend on whether or not the reset happened whilst the clock was high. But I'm waaaaayy off in the weeds here.