Hi,
I've been going though trying to understand how the old 8-bit micros (Z80/6502) that I learnt on years ago actually work at a digital level. Looking here on Visual6502.org and stepping through the first couple of instructions I saw this



During the JSR routine the docs (MCS6500) just says ADL is "stored" - from visual 6502 it looks like it does this in the S register? then just decrements ADL and then swaps them back for the last bit when it reads ADH and completes the jump. I've not been able to find confirmation of this (or the right thing to search for) - but does anyone know if this is indeed what happens?

That simulation is all the confirmation we have, AFAIK, but it makes excellent sense and saves a temporary register which would have cost silicon area.

As the simulation is driven by switch-level simulation of the transistor netlist as extracted from photographs of the chip, I think it's evidence enough.

The value of S is at the time travelling through the ALU to be decremented, so the S register is briefly not required. It's an ingenious manoeuvre.

Oh, and welcome!

Thank you