Sorry, but this is going to be long. I'll break it into hopefully edible chunks.
This is part of my investigations into the various ways one might generate vga signals as simply as possible but without using programmable logic devices. This uses an eprom/eeprom/flash so it comes close... inspired by this video by Dr Matt Regan:
https://www.youtube.com/watch?v=qO1dNRKHeb4The approach he uses doesn't quite work for a number of reasons for VGA, not least of which is the increased memory width required, so I did some thinking.
State machinesA state machine can be easily built using a prom and a latch of its outputs, with the latched outputs fed back to the address inputs of the prom. On each clock pulse, the latch will read the current output and deliver it back to the input; the next clock pulse will latch the data at this new address.
An incrementing counter is probably the most simple: it requires only that each memory location contains the address of the next location.
An arbitrary sequence can be generated in this way, for example the count required for a video output can be implemented at any length just by letting the last address refer back to the start address of the line: 01→02→03→04→00 (that’s a very short line!).
This approach can be used for both the character position in the line and the line count through the video field. The syncs and blanking can be encoded using higher bits in the address to enable their extraction without external logic.
Ideally, to save circuit board real estate, one would want to use a single prom. Commonly available parts are 8- or 16-bits wide.
VGA timingThe simple vga video signal is 640 by 480 pixels, plus blanking and syncs. Separate vertical and horizontal syncs are required, negative going; the sense of the blanking signal is arbitrary but convenient if true during active picture.
A character based vga output using a character cell of eight pixels wide by sixteen deep provides a display of eighty characters by thirty. To output a character, the datum representing that character must be extracted from video ram and latched; the latched output is fed to a character prom along with four bits of data representing the line count within the character. The output from that character prom is latched and serialised during the eight-pixel character time.
A graphical vga output of the same resolution will still read a character from ram, but will require sixteen times as much ram as the character version since each datum is displayed only once without translation.
In both cases the line timing is the same: for standard 60Hz vga, the dotclock is 25.175MHz and the ‘character clock’ one eighth of that. Since all the line timings are integers based on the dot clock and divisible by eight, it is convenient to use character timings.
0 – 79 Active line (starts at 0x00)
80 – 81 Front porch (starts at 0x50)
82 – 94 Line sync (starts at 0x52)
95 – 99 Back porch (starts at 0x5E)
Let’s choose the three highest (of sixteen) bits for the control outputs: 0x8000 for line sync, 0x4000 for field sync, and 0x2000 for blanking. Let us also assume for now that the control signals are active high. We can sort them out later.
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